• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.10
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• pp.2209-2216
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• 2011

In this paper, we design a 32-bit eFuse OTP memory for PMICs using MagnaChip's $0.18{\mu}m$ process. We solve a problem of an electrical shortage between an eFuse link and the VSS of a p-substrate in programming by placing an n-well under the eFuse link. Also, we propose a WL driver circuit which activates the RWL (read word-line) or WWL (write word-line) of a dual-port eFuse OTP memory cell selectively when a decoded WERP (WL enable for read or program) signal is inputted to the eFuse OTP memory directly. Furthermore, we reduce the layout area of the control circuit by removing a delay chain in the BL precharging circuit. We'can obtain an yield of 100% at a program voltage of 5.5V on 94 manufactured sample dies when measured with memory tester equipment.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.66-71
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• 2014

This paper presents an analog front-end integrated circuit (IC) for medical ultrasound imaging systems using standard $0.18-{\mu}m$ CMOS process. The proposed front-end circuit includes the transmit part which consists of 15-V high-voltage pulser operating at 2.6 MHz, and the receive part which consists of switch and a low-power low-noise preamplifier. Depending on the operation mode, the output driver in the transmit pulser can be reconfigured as the switch in the receive path and thus the area of the overall front-end IC is reduced by over 70% in comparison to previous work. The designed single-channel front-end prototype consumes less than $0.045mm^2$ of core area and can be utilized as a key building block in highly-integrated multi-array ultrasound medical imaging systems.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.5
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• pp.3385-3390
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• 2015

In this paper, we constructed using a Cortex M3 microcontroller developed by ARM Inc. as a way to control the LED light more efficiently. And Using the short-range wireless communication by the Bluetooth communication method applied to control the LED light was configured to wirelessly control the wireless circuits. In this paper, users can easily download and easy to wirelessly control the LED lighting control circuit to design an Android application from Android-based smartphone so that you can control with your smartphone to have anyone to control the LED lighting control circuit wirelessly. If the LED lights radio control circuit is configured with the Cortex M3 in this paper is applicable to both indoor and outdoor and eco-friendly technology, is using LED driver to enhance the efficiency of the LED becomes stable voltage supply is made, the brightness of LED lighting control.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.2
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• pp.143-149
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• 2021

BLDC motors are getting better performance due to the improvement of material technology including high performance of permanent magnets, advancement of driving IC technology with high integration and high functionality, and improvement of assembly technology such as high point ratio. While having the advantage of such a square wave driven BLDC motor, interest in the design and development of a square wave driven BLDC permanent magnet motor and development of a position detection circuit and driver is increasing in order to more meet the needs of users. However, in spite of the cost and functional advantages due to reduced efficiency, switching loss and vibration, noise, etc., the application is somewhat limited. Therefore, in this paper, we study a position detection circuit that generates a sinusoidal signal in proportion to the magnetic flux of a BLDC motor rotor using a Hall Effect Sensor that generates a sinusoidal wave to increase the efficiency of the motor, reduce ripple, and drive a sinusoidal current with excellent speed and torque characteristics.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.4
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• pp.135-141
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• 2021

Interest is growing in the design and development of square wave driven BLDC permanent magnet motors suitable for industrial automation, and the development of position detection circuits and drivers. However, this motor is somewhat limited in its application despite the price and functional advantages due to the decrease in efficiency due to switching loss and vibration and noise. In the process of designing and assembling a BLDC motor, the magnetic pole angle is not uniform or the magnetic flux distribution is distorted due to problems in magnetic circuit design or product non-uniformity in the assembly process. Therefore, these things cause position detection deviation and deteriorate the motor characteristics. In addition, the sine wave driven BLDC system can operate stably only when the signal generated from the position sensor is accurately fed back to the driver. However, since the generated signal cannot perform stable position detection due to the occurrence of DC offset component due to magnetic flux density deviation or magnetization technology, which is an external influence, this study intends to study the proposed circuit that can remove the DC offset component.

• Journal of Radiation Industry
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• v.6 no.1
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.70-77
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• 2013

We suggest a low area and high efficiency switched-mode power supply (SMPS) with a pulse width modulation (PWM) generator based on a pseudo relaxation-oscillating technique. In the proposed circuit, the PWM duty ratio is determined by the voltage slope control of an internal capacitor according to amount of charging current in a PWM generator. Compared to conventional SMPSs, the proposed control method consists of a simple structure without the filter circuits needed for an analog-controlled SMPS or the digital compensator used by a digitally-controlled SMPS. The proposed circuit is able to operate at switching frequency of 1MHz~10MHz, as this frequency can be controlled from the selection of one of the internal capacitors in a PWM generator. The maximum current of the core circuit is 2.7 mA, and the total current of the entire circuit including output buffer driver is 15 mA at 10 MHz switching frequency. The proposed SMPS has a simulated maximum ripple voltage of 7mV. In this paper, to verify the operation of the proposed circuit, we performed simulation using Dongbu Hitek BCD $0.35{\mu}m$ technology and measured the proposed circuit.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.3
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• pp.277-282
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• 2005

This paper describes a step-down AC voltage regulator using an AC chopper and auxiliary transformer, which is a series connected to the main input. The detail design of the AC regulator, logic and PWM pattern of the AC chopper is described and the three-phase AC regulator using two single­phase AC choppers with a three transformer configuration is proposed for three-phase application. The proposed three-phase system has the advantages of lower system cost due to reduced switch number and gate driver circuit as well as advantages of decreased size and weight because it uses a series compensated scheme. The proposed AC regulator has many benefits such as fast voltage control, high efficiency and simple control logic. Experimental results indicate that it can be used as a step-down AC voltage regulator for power saving purposes very efficiently.

• Journal of Power Electronics
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• v.5 no.1
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• pp.36-44
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• 2005

This paper presents an implementation of high performance control of a reluctance synchronous motor (RSM) using a neural network with a direct torque control. The equivalent circuit in a RSM, which considers iron losses, is theoretically analyzed. Also, the optimal current ratio between torque current and exiting current is analytically derived. In the case of a RSM, unlike an induction motor, torque dynamics can only be maintained by controlling the flux level because torque is directly proportional to the stator current. The neural network is used to efficiently drive the RSM. The TMS320C3l is employed as a control driver to implement complex control algorithms. The experimental results are presented to validate the applicability of the proposed method. The developed control system shows high efficiency and good dynamic response features for a 1.0 [kW] RSM having a 2.57 ratio of d/q.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.1
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• pp.29-34
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• 2016

A controller area network (CAN) controller is an integral part of an electronic control unit, particularly in an advanced driver assistance system application, and its characteristics should always be advantageous in all aspects of functionality especially in real time application. The cost should be low, while maintaining the functionality and reliability of the technology. However, a CAN protocol implementing serial operation results in slow throughput, especially in a cyclical redundancy checking (CRC) unit. In this paper, digital signal processing (DSP) algorithms are implemented, namely pipelining, unfolding, and retiming the CAN controller in the CRC unit, particularly for the encoder and decoder sections. It must attain a feasible iteration bound, a critical path that is appropriate for a CAN system, and must obtain a superior design of a high-speed parallel circuit for the CRC unit in order to have a faster transmission rate. The source code for the encoder and decoder was formulated in the Verilog hardware description language.