Browse > Article
http://dx.doi.org/10.6109/jkiice.2011.15.10.2209

Design of a 32-Bit eFuse OTP Memory for PMICs  

Kim, Min-Sung (창원대학교)
Yoon, Keon-Soo (창원대학교)
Jang, Ji-Hye (창원대학교)
Jin, Liyan (창원대학교)
Ha, Pan-Bong (창원대학교)
Kim, Young-Hee (창원대학교)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.15, no.10, 2011 , pp. 2209-2216 More about this Journal
Abstract
In this paper, we design a 32-bit eFuse OTP memory for PMICs using MagnaChip's $0.18{\mu}m$ process. We solve a problem of an electrical shortage between an eFuse link and the VSS of a p-substrate in programming by placing an n-well under the eFuse link. Also, we propose a WL driver circuit which activates the RWL (read word-line) or WWL (write word-line) of a dual-port eFuse OTP memory cell selectively when a decoded WERP (WL enable for read or program) signal is inputted to the eFuse OTP memory directly. Furthermore, we reduce the layout area of the control circuit by removing a delay chain in the BL precharging circuit. We'can obtain an yield of 100% at a program voltage of 5.5V on 94 manufactured sample dies when measured with memory tester equipment.
Keywords
PMIC; eFuse; Dual Port; OTP;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 Du-Kwi Kim, Ji-Hye Jang, Liyan Jin, Jae-Hyung Lee, Pan-Bong Ha, and Young-Hee Kim, "Design and Measurement of a 1-KBit eFuse One-Time Programmable Memory IP Based on a BCD Process", The Institute of Electronics, Information, and Communication Engineers, vol. E93-C, no. 8, pp. 1365-1370, Aug. 2010.
2 Jeong-Ho Kim, Du-Hwi Kim, Liyan Jin, Pan-Bong Ha, and Young-Hee Kim, "Design of 1-Kb eFuse OTP Memory IP with Reliability Considered", Journal of Semiconductor Technology and Science, vol. 11, no. 2, pp. 88-94. June 2011.   DOI   ScienceOn
3 Donald G. Fink and Donald Christiansen, Electronics Engineers' Handbook, McGraw-Hill, Nov. 1996.
4 N. Robson et al., "Electrically Programmable Fuse (eFuse): From Memory Redundancy to Autonomic Chips", Proceedings of Custom Integrated Circuits Conference, pp. 799-804, Sep. 2007.
5 S. H. Kulkarni et al., "High-Density 3-D Metal-Fuse PROM featuring 1.37$mu$m2 1T1R Bit Cell in 32nm High-k Metal-Gate CMOS Technology", Symp. VLSI Circuits, pp. 28-29, 2009.