• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.91-105
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• 2016

Carbon Nanotube Field-Effect Transistors (CNTFETs) have been studied as candidates for post Si CMOS owing to the better electrostatic control and high mobility. To enhance the immunity against short - channel effects (SCEs), the novel channel and gate engineered architectures have been proposed to improve CNTFETs performance. This work presents a comprehensive study of the influence of channel and gate engineering on the CNTFET switching, high frequency and circuit level performance of carbon nanotube field-effect transistors (CNTFETs). At device level, the effects of channel and gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green's functions (NEGF) solved self - consistently with Poisson's equations. It is revealed that hetero - material - gate and lightly doped drain and source CNTFET (HMG - LDDS - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, improve the switching speed, and is more suitable for use in low power, high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the impact of the channel and gate engineering on basic digital circuits (inverter, static random access memory cell) have been investigated systematically. The performance parameters of circuits have been calculated and the optimum metal gate workfunction combinations of ${\Phi}_{M1}/{\Phi}_{M2}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product (PDP). In addition, we discuss and compare the CNTFET-based circuit designs of various logic gates, including ternary and binary logic. Simulation results indicate that LDDS - HMG - CNTFET circuits with ternary logic gate design have significantly better performance in comparison with other structures.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.9
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• pp.1079-1086
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• 2012

In this paper, X-band 60 W Solid-State Power Amplifier with sequential control circuit and pulse width variation circuit for improve bias of SSPA module was designed. The sequential control circuit operate in regular sequence drain bias switching of GaAs FET. The distortion and efficiency of output signals due to SSPA nonlinear degradation is increased by making operate in regular sequence the drain bias wider than that of RF input signals pulse width if only input signal using pulsed width variation. The GaAs FETs are used for the 60 W SSPA module which is consists of 3-stage modules, pre-amplifier stage, driver-amplifier stage and main-power amplifier stage. The main power amplifier stage is implemented with the power combiner, as a balanced amplifier structure, to obtain the power greater than 60 W. The designed SSPA modules has 50 dB gain, pulse period 1 msec, pulse width 100 us, 10 % duty cycle and 60 watts output power in the frequency range of 9.2~9.6 GHz and it can be applied to solid-state pulse compression radar using pulse SSPA.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.785-792
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• 2012

In this paper, a current-voltage characteristics of n-channel junctionless and inversion mode(IM) MuGFET, and p-channel junctionless and accumulation mode(AM) MuGFET has been measured and analyzed for the application in high speed and low power switching devices. From the variation of the threshold voltage and the saturation drain current with the substrate bias voltages, their variations in IM devices are larger than junctionless devices for n-channel devices, but their variations in junctioness devices are larger than AM devices for p-channel devices. The variations of transconductance with substrate biases are more significant in p-channel devices than n-channel devices. From the characteristics of subthreshold swing, it was observed that the S value is almost independent on the substrate biases in n-channel devices and p-channel junctionless devices but it is increased with the increase of the substrate biases in p-channel AM devices. For the application in high speed and low power switching devices using the substrate biases, IM device is better than junctionless devices for n-channel devices and junctionless device is better than AM devices for p-channel devices.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.5
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• pp.1149-1154
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• 2014

To observe the tunneling phenomenon of oxide semiconductor transistor, The Indium-gallum-zinc-oxide thin film transistors deposited on SiOC as a gate insulator was prepared. The interface characteristics between a dielectric and channel were changed in according to the properties of SiOC dielectric materials. The transfer characteristics of a drain-source current ($I_{DS}$) and gate-source voltage ($V_{GS}$) showed the ambipolar or unipolar features according to the Schottky or Ohmic contacts. The ambipolar transfer characteristics was obtained at a transistor with Schottky contact in a range of ${\pm}1V$ bias voltage. However, the unipolar transfer characteristics was shown in a transistor with Ohmic contact by the electron trapping conduction. Moreover, it was improved the on/off switching in a ambipolar transistor by the tunneling phenomenon.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.172-178
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• 2016

In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.572-578
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• 2014

In order to overcome small current drivability of a tunneling field-effect transistor (TFET), a TFET using Schottky barrier (SBTFET) is proposed. The proposed device has a metal source region unlike the conventional TFET. In addition, dopant segregation technology between the source and channel region is applied to reduce tunneling resistance. For TFET fabrication, spacer technique is adopted to enable self-aligned process because the SBTFET consists of source and drain with different types. Also the control device which has a doped source region is made to compare the electrical characteristics with those of the SBTFET. From the measured results, the SBTFET shows better on/off switching property than the control device. The observed drive current is larger than those of the previously reported TFET. Also, short-channel effects (SCEs) are investigated through the comparison of electrical characteristics between the long- and short-channel SBTFET.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.265.2-265.2
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• 2016

Oxide thin film transistors (TFTs) have attracted considerable interest for gate diver and pixel switching devices of the active matrix (AM) liquid crystal display (LCD) and organic light emitting diode (OLED) display because of their high field effect mobility, transparency in visible light region, and low temperature processing below $300^{\circ}C$. Recently, oxide TFTs with polycrystalline In-Ga-O(IGO) channel layer reported by Ebata. et. al. showed a amazing field effect mobility of $39.1cm^2/Vs$. The reason having high field effect mobility of IGO TFTs is because $In_2O_3$ has a bixbyite structure in which linear chains of edge sharing InO6 octahedral are isotropic. In this work, we investigated the characteristics and the effects of oxygen partial pressure significantly changed the IGO thin-films and IGO TFTs transfer characteristics. IGO thin-film were fabricated by rf-magnetron sputtering with different oxygen partial pressure ($O_2/(Ar+O_2)$, $Po_2$)ratios. IGO thin film Varies depending on the oxygen partial pressure of 0.1%, 1%, 3%, 5%, 10% have been some significant changes in the electrical characteristics. Also the IGO TFTs VTH value conspicuously shifted in the positive direction, from -8 to 11V as the $Po_2$ increased from 1% to 10%. At $Po_2$ was 5%, IGO TFTs showed a high drain current on/off ratio of ${\sim}10^8$, a field-effect mobility of $84cm^2/Vs$, a threshold voltage of 1.5V, and a subthreshold slpe(SS) of 0.2V/decade from log(IDS) vs VGS.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.8
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• pp.752-758
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• 2004

This paper reports on the DC and RF characteristics of AlGaN/InGaN/GaN high electron-mobility transistors (HEMTs) grown by molecular beau epitaxy(MBE) on sapphire substrates. The devices with a 0.5 ${\mu}$m gate-length exhibited relatively flat transconductance(g$\_$m/), which results from the enhanced carrier confinement of the InGaN channel. The maximum drain current was 880 mA/mm with a peak g$\_$m/ of 156 mS/mm, an f$\_$T/ of 17.3 GHz, and an f$\_$MAX/ or 28.7 GHz. In addition to promising DC and RF results, pulsed I-V and current-switching measurements showed little dispersion in the unpassivated AlGaN/InGaN HEMTs. These results suggest that the addition of In to the GaN channel improves the electron transport characteristics as well as suppressing current collapse that is related to the surface trap states.

• Journal of Information Display
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• v.9 no.4
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• pp.21-29
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• 2008

We studied both the wavelength and intensity dependent photo-responses (photofield-effect) in amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs). During the a-IGZO TFT illumination with the wavelength range from $460\sim660$ nm (visible range), the off-state drain current $(I_{DS_off})$ only slightly increased while a large increase was observed for the wavelength below 400 nm. The observed results are consistent with the optical gap of $\sim$3.05eV extracted from the absorption measurement. The a-IGZO TFT properties under monochromatic illumination ($\lambda$=420nm) with different intensity was also investigated and $I_{DS_off}$ was found to increase with the light intensity. Throughout the study, the field-effect mobility $(\mu_{eff})$ is almost unchanged. But due to photo-generated charge trapping, a negative threshold voltage $(V_{th})$ shift is observed. The mathematical analysis of the photofield-effect suggests that a highly efficient UV photocurrent conversion process in TFT off-region takes place. Finally, a-IGZO mid-gap density-of-states (DOS) was extracted and is more than an order of magnitude lower than reported value for hydrogenated amorphous silicon (a-Si:H), which can explain a good switching properties observed for a-IGZO TFTs.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.11
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• pp.27-32
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• 1999

Metal-ferroelectric-semiconductor devices by susing rapid thermal annealed $LiNbO_3/Si$(100) structures were fabricated and demonstrated nonvolatile memory operations. The estimated field-effect electron mobility and transconductance on a linear region of the fabricated FET were about $600cm^2/V{\cdot}s$ and 0.16mS/mm, respectively. The ID-VG characteristics of MFSFET's showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3 films. The drain current of the on state was more than 4 orders of magnitude larger than the off state current at the same read gate voltage of 0.5V, which means the memory operation of the MFSFET. A write voltage as low as ${\pm}3V$, which is applicable to low power integrated circuits, was used for polarization reversal. The ferroelectric capacitors showed no polarization degradation up to $10^{10}$ switching cycles with the application of symmetric bipolar voltage pulse (peak-to-peak 6V, 50% duty cycle) of 500kHz.