• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.3
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• pp.72-78
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• 1990

In this paper, the physical meanings of LDD optimization are treated by numerical simulation and related experiments are attempted to analyzed the optimized LDD structure. Firstly, according to the numerical analysis, the electric field under the n-region near drain is low and uniformly distributed and the current flow is widely distributed in this region under the optimized conditions. It is also found that this optimized point should be achieved by globally optimizing all the process and electrical conditions. Secondly, the maximum electric field, which is obtained from the substrate current to the drain current ratio, is minimized under the optimized condition according to the experiment. Further, the device lifetime is maximized and the n-resistance is changed smoothly from the channel resistance to the $n^+$junction resistance.

• Journal of the Korean Geotechnical Society
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• v.21 no.10
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• pp.27-39
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• 2005

A finite difference program with 3-D governing equation expanded from 1-D self-weight consolidation is developed to analyze the consolidation behavior of surface dredged soil with horizontal drains. Various boundary conditions with horizontal drains and seepage pressure of pore water infiltrated to the drains are considered in the program. A laboratory soil chamber experiment for the consolidation of dredged soil is performed to validate the program and the measured settlement-time result is compared with the one predicted by the program. The influence of design conditions of horizontal drains such as horizontal installation spacing, installation depth and number of drain layers, on the consolidation is analyzed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.5-6
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• 2005

High performance SiGe heterostructure metal-oxide-semiconductor field effect transistors(MOSFETs) were fabricated using well-controlled delta-doping of boron and SiGe/Si heterostructure epitaxal layers grown by reduced pressure chemical vapor deposition. In this paper, we report 1/f noise characteristics of the SiGe MOSFETs measured under various bias conditions of the gate and drain voltages changing in linear operation regions. From the noise spectral density, we found that the gate and drain voltage dependence of the noise represented same features, as usually scaled with $f^1$. However, 1/f noise was found to be much lower in the device with boron delta-doped layer, by a factor of $10^{-1}\sim10^{-2}$ in comparion with the device fabricated without delta-doped layer. 1/f noise property of delta-doped device looks important because the device may replace bipolar transistors most commonly embedded in high-frequency oscillator circuits.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.7-11
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• 2017

In this paper, we have studied the characteristics of NAND Flash memory in SONOS Poly-Si Thin Film Transistor (Poly-Si TFT) device. Source/drain junctions(S/D) of cells were not implanted and selective transistors were located in the end of cells. We found the optimum conditions of process by means of the estimation for the doping concentration of channel and source/drain of selective transistor. As the doping concentration was increased, the channel current was increased and the characteristic of erase was improved. It was believed that the improvement of erase characteristic was probably due to the higher channel potential induced by GIDL current at the abrupt junction. In the condition of process optimum, program windows of threshold voltages were about 2.5V after writing and erasing. In addition, it was obtained that the swing value of poly Si TFT and the reliability by bake were enhanced by increasing process temperature of tunnel oxide.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.28 no.2C
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• pp.75-81
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• 2008

In this study, a series of laboratory column test on Suction Drain Method which is one of the way to make an soft ground improvement were conducted in order to investigate the effect of the Hardening Zones and the ratio of improvements depending on periods of the improvements and various applied suction pressures. On this occasion, the experimental conditions are followings; in the case of the periods of effectiveness, 4 days, 8 days, 12 days, 16 days, 20 days and in the case of the applied pressures of the Suction are -20 kPa, -40 kPa, -60 kPa and -80 kPa were carried out. As a result of test, settlement increased with suction pressure and duration increase, and gradually converged. Also, as comparing permeability decrease ratio with which calculated back from water content and numerically predicted using Hansbo's radial consolidation theory, measured value was almost coincide with predicted value when permeability decrease ratio was assumed as 2~3. Furthermore, the hardening zone was appeared within 7~8 cm of whole radial (25 cm).

• Proceedings of the Korean Geotechical Society Conference
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• 2000.11a
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• pp.641-648
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• 2000

The horizontal drain method by installing drains horizontally in the ground is often used to expedite the dispersion of pore water and to increase the strength of dredged soft clay under the action of gravity or vacuum. In this study a numerical analysis method is developed to predict the consolidation process of soft ground with horizontal drains. One-dimensional self-weight consolidation theory is extended tn three-dimensions] theory with appropriate boundary conditions of horizontal drains. In the condition of pore water drainage by gravity, the behavior of the dredged clay with horizontal drains is compared with that of the clay without drains. The influence of design factors of drains on consolidation process is also analyzed.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1315-1317
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• 1998

We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshold voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate bias stressing and under the gate and drain bias stressing. Also, we have quantitatively analized the degradation phenomena using by analytical method. we have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the poly-Si is prevalent in gate and drain bias stressed device.

• Magazine of the Korean Society of Agricultural Engineers
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• v.42
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• pp.68-77
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• 2000

Analyses, in which load was regarded as instant load and gradual step load, respectively, were performed with data measured on a gradually loaded field, and the results were inspected to find the effect of load conditions, and the final settlements which were predicted by Hyperbolic, Tan's, Asaoka's, and Monden's methods were compared with each other. Settlement curves in which load was regarded as instant load and gradual step load being to coincide at twice the time of duration of embankment. On the ground installed vertical drain, from the results of Hyperbolic, Tan's, Asaoka's, Monden's, Curve fitting I, and Curve fitting II (simple, carrillo) methods it was concluded that Asaoka, Curve fitting I, and Curve fitting II methods are reliable for prediction final settlement with back analysis.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.7
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• pp.1033-1041
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• 1990

In this paper, under pinch-off conditions, the gate-drain breakdown voltage characteristics of GaAs Power MESFET's as a function of device parameters such as channel thickness, doping concentration, gate length etc. are analyzed. Using the Green's function, the gate ionic charge induced by the depleted channel ionic charge is calculated. The impact ionization integral by avalanche multiplication between gate and drain is used to investigate breakdown phenomena. Especially, the localized excess surface charge effect as well as the uniform surface charge effect on breakdown voltage is considered.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.367-372
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• 1999

We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshod voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate only and the gate and drain bias stressing. Also, we have quantitatively analyzed the degradation phenomena by analytical method. We have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the channel region and $poly-Si/SiO_2$ interface is prevalent in gate and drain bias stressed device.