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http://dx.doi.org/10.6117/kmeps.2017.24.3.007

A Study on Poly-Si TFT characteristics with string structure for 3D SONOS NAND Flash Memory Cell  

Choi, Chae-Hyoung (Div. of Electronics & Information Engineering, Yeungnam University College)
Choi, Deuk-Sung (Div. of Electronics & Information Engineering, Yeungnam University College)
Jeong, Seung-Hyun (Div. of Electronics & Information Engineering, Yeungnam University College)
Publication Information
Journal of the Microelectronics and Packaging Society / v.24, no.3, 2017 , pp. 7-11 More about this Journal
Abstract
In this paper, we have studied the characteristics of NAND Flash memory in SONOS Poly-Si Thin Film Transistor (Poly-Si TFT) device. Source/drain junctions(S/D) of cells were not implanted and selective transistors were located in the end of cells. We found the optimum conditions of process by means of the estimation for the doping concentration of channel and source/drain of selective transistor. As the doping concentration was increased, the channel current was increased and the characteristic of erase was improved. It was believed that the improvement of erase characteristic was probably due to the higher channel potential induced by GIDL current at the abrupt junction. In the condition of process optimum, program windows of threshold voltages were about 2.5V after writing and erasing. In addition, it was obtained that the swing value of poly Si TFT and the reliability by bake were enhanced by increasing process temperature of tunnel oxide.
Keywords
SONOS; Poly-Si; TFT; Sting; Selective Transistor; Cycling; Bake; Program; Erase; Tunneling oxide;
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Times Cited By KSCI : 1  (Citation Analysis)
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