• Title/Summary/Keyword: digital error correction

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A Study on the Performance Digital Beamforming using Antenna Error Correction and Modified Optimum Weight for Improved Signal Estimation (향상된 신호 추정을 위한 안테나 오차 보정 과 수정된 최적 가중치를 이용한 디지털 빔 형성 성능 분석에 관한 연구)

  • Cho, Sung Kuk;Lee, Jun Dong;Yang, Gill Mo
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.10 no.4
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    • pp.63-70
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    • 2014
  • Method a target estimation in spatial are mobile wireless communication using network cell and GPS. It have much error that mobile wireless communication depend on cell size. GPS method can't find a target in shadow and inner area. In this paper, we estimate a target as direction of arrival method using adaptive array antenna system. Adaptive array antenna system can obtain desired signal to remove other signal This paper studied digital beamforming method in order to estimation a target. Proposed method is modified optimum weight and antenna error correction to estimation an optimal receive signal. Digital beamforming method decided a signal phase and amplitude from received signal on array antenna element. But if it is not to do error correction of received signal, system performance have decreased. Firstly, we proposed modified optimum weight in order to finding desired target. Secondly, we are error correction of antenna incident signals by optimal weight before digital beamforming method. Thirdly, throughly simulation, we showed that system performance of proposed method compare proposal method with general method. It have improved resolution of estimation target to good performance more proposed method than general method.

Electrostatic Coupling Intra-Body Communication Based on Frequency Shift Keying and Error Correction (FSK 통신 및 에러 정정을 통한 Intra-Body Communication)

  • Cho, Seongho;Park, Daejin
    • IEMEK Journal of Embedded Systems and Applications
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    • v.15 no.4
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    • pp.159-166
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    • 2020
  • The IBC (Intra-Body Communication) benefits from a wireless communication system for exchanging various kinds of digital information through wearable electronic devices and sensors. The IBC using the human body as the transmission channel allows wireless communication without the transmitting radio frequency waves to the air. This paper discusses the results of experiments on electrostatic coupling IBC based on FSK (Frequency Shift Keying) and 1 bit error correction. We implemented FSK communication and 1 bit error correction algorithm using the MCU boards and aluminum tape electrodes. The transmitter modulates digital data using 50% duty square wave as carrier signal and transmits data through human body. The receiver performs ADC (Analog to Digital Conversion) on carrier signal from human body. In order to figure out the frequency of carrier signal from ADC results, we applied zero-crossing algorithm which is used to detect the edge characteristic in computer vision. Experiment results shows that digital data modulated as square wave can be successfully transmitted through human body by applying the proposed architecture of a 1ch GPIO as a transmitter and 1ch ADC for as a receiver. Also, this paper proposes 1 bit error correction technique for reliable IBC. This technique performs error correction by utilizing the feature that carrier signal has 50% duty ratio. When 1 bit error correction technique is applied, the byte error rate at receiver side is improved around 3.5% compared to that not applied.

The Design of Error Detection Auto Correction for Conversion of Graphics to DTV Signal

  • Ryoo-Dongwan;Lee, Jeonwoo
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.106-109
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    • 2002
  • In the integrated systems, that is integrated digital TV(DTV) internet and home automation, like home server, is needed integration of digital TV video signal and computer graphic signal. The graphic signal is operating at the high speed and has time-divide-stream. So the re-request of data is not easy at the time of error detection. therefore EDAC algorithm is efficient. This paper presents the efficiency error detection auto correction(EDAC) for conversion of graphics signal to DTV video signal. A presented EDAC algorithms use the modified Hamming code for enhancing video quality and reliability. A EDAC algorithm of this paper can detect single error, double error, triple error and more error for preventing from incorrect correction. And it is not necessary an additional memory. In this paper The comparison between digital TV video signal and graphic signal, a EBAC algorithm and a design of conversion graphic signal to DTV signal with EDAC function is described.

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The Performance evaluation of the Reed-Solomon Product Code(RSPC) (Reed-Solomon Product Code의 에러 정정 능력 평가 방법)

  • Hwang, Sung-Hee;Lee, Yoon-Woo;Han, Sung-Hyu;Ryu, Sang-Hyun;Shin, Dong-Ho;Park, In-Sik
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2496-2498
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    • 2001
  • 광 디스크 channel상에서 RSPC의 error correction capability를 확률적인 계산 방법으로 계산하는 데는 많은 어려움이 있다. 그 이유는 바로 광 디스크 channel이 burst error channel이기 때문인데, 이 burst error를 어떻게 다루는 가에 따라 그 error correction capability는 사뭇 달라진다. 이 논문에서는 Sony의 dust error distribution[1] 아래에서 4-state Morkov Chain[2]로 modeling하고 그 결과를 가지고 burst error를 channel의 특성과 ECC format의 특성에 맞게 제어할 수 있는 확률적인 계산방법을 소개하고 그것을 simulation하고자 한다.

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Error Correction of Digital Data in Radio Data System (라디오 데이터 시스템의 디지털 데이터 에러 정정)

  • 김기근
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1991.06a
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    • pp.78-81
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    • 1991
  • Digital radio data is composed of groups which are divided into 4 blocks of 26 bits. And each block is made up of information word and check word. Check word of digital radio data that is composed ofcode word and offset word is used for group/block synchronization and error correction. In this paper, we have investigated the group/block synchronizer using offext word and shortened cyclic decoder for correcting error produced during the radio data transimission. Also, we have simulated the decoding process of the proposed decoder. From the simulation results, we have confirmed that the proposed decoder most with the required coding capcbility.

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Bit-selective Forward Error Correction for Digital Mobile Communications (디지털 이동통신을 위한 비트 선택적 에러정정부호)

  • Yang, Kyeong-Cheol;Lee, Jae-Hong
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.198-202
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    • 1988
  • In digital mobile communications received speech data are affected by burst errors as well as random errors. To overcome these errors we propose a bit-selective forward error correction scheme for the speech data which is sub-band coded at 13 kbps and transmitted over a 16 kbps channel. For a few error correcting codes the signal-to-noise ratio of error-corrected speech is obtained and compared through the simulation of mobile communication channels.

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A 10-b 500 MS/s CMOS Folding A/D Converter with a Hybrid Calibration and a Novel Digital Error Correction Logic

  • Jun, Joong-Won;Kim, Dae-Yun;Song, Min-Kyu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.1
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    • pp.1-9
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    • 2012
  • A 10-b 500 MS/s A/D converter (ADC) with a hybrid calibration and error correction logic is described. The ADC employs a single-channel cascaded folding-interpolating architecture whose folding rate (FR) is 25 and interpolation rate (IR) is 8. To overcome the disadvantage of an offset error, we propose a hybrid self-calibration circuit at the open-loop amplifier. Further, a novel prevision digital error correction logic (DCL) for the folding ADC is also proposed. The ADC prototype using a 130 nm 1P6M CMOS has a DNL of ${\pm}0.8$ LSB and an INL of ${\pm}1.0$ LSB. The measured SNDR is 52.34-dB and SFDR is 62.04-dBc when the input frequency is 78.15 MHz at 500 MS/s conversion rate. The SNDR of the ADC is 7-dB higher than the same circuit without the proposed calibration. The effective chip area is $1.55mm^2$, and the power dissipates 300 mW including peripheral circuits, at a 1.2/1.5 V power supply.

Performance Improvement of Asynchronous Mass Memory Module Using Error Correction Code (에러 보정 코드를 이용한 비동기용 대용량 메모리 모듈의 성능 향상)

  • Ahn, Jae Hyun;Yang, Oh;Yeon, Jun Sang
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.3
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    • pp.112-117
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    • 2020
  • NAND flash memory is a non-volatile memory that retains stored data even without power supply. Internal memory used as a data storage device and solid-state drive (SSD) is used in portable devices such as smartphones and digital cameras. However, NAND flash memory carries the risk of electric shock, which can cause errors during read/write operations, so use error correction codes to ensure reliability. It efficiently recovers bad block information, which is a defect in NAND flash memory. BBT (Bad Block Table) is configured to manage data to increase stability, and as a result of experimenting with the error correction code algorithm, the bit error rate per page unit of 4Mbytes memory was on average 0ppm, and 100ppm without error correction code. Through the error correction code algorithm, data stability and reliability can be improved.

A Study on Super Resolution Optimum Beam Steering Pattern for Improvement Moving Target Estimation Accuracy (이동 목표물 추정 정확도를 향상시키기 위한 고 분해능 최적 빔 지향 패턴에 관한 연구)

  • Cho, Sung Kuk;Jeon, Byung Kook;Yang, Gill Mo
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.10 no.4
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    • pp.71-78
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    • 2014
  • Method a target estimation in spatial are mobile wireless communication using network cell and GPS. It have much error that mobile wireless communication depend on cell size. GPS method can't find a target in shadow and inner area. In this paper, we estimate a target as direction of arrival method using adaptive array antenna system. Adaptive array antenna system can obtain desired signal to remove other signal This paper studied digital beamforming method in order to estimation a target. Proposed method is modified optimum weight and antenna error correction to estimation an optimal receive signal. Digital beamforming method decided a signal phase and amplitude from received signal on array antenna element. But if it is not to do error correction of received signal, system performance have decreased. Firstly, we proposed modified optimum weight in order to finding desired target. Secondly, we are error correction of antenna incident signals by optimal weight before digital beamforming method. Thirdly, throughly simulation, we showed that system performance of proposed method compare proposal method with general method. It have improved resolution of estimation target to good performance more proposed method than general method.

Implementation of High Reliable Fault-Tolerant Digital Filter Using Self-Checking Pulse-Train Residue Arithmetic Circuits (자기검사 Pulse별 잉여수연산회로를 이용한 고신뢰화 Fault Tolerant 디지털필터의 구성에 관한 연구)

  • 김문수;손동인;전구제
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.2
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    • pp.204-210
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    • 1988
  • The residue number system offers the possibility of high-speed operation and error detection/correction because of the separability of arithmetic operations on each digit. A compact residue arithmetic module named the self-checking pulse-train residue arithmetic circuit is effectively employed as the basic module, and an efficient error detection/correction algorithm in which error detection is performed in each basic module and error correction is performed based on the parallelism of residue arithmetic is also employed. In this case, the error correcting circuit is imposed in series to non-redundant system. This design method has an advantage of compact hardware. Following the proposed method, a 2nd-order recursive fault-tolerant digital filter is practically implemented, and its fault-tolerant ability is proved by noise injection testing.

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