• Title/Summary/Keyword: die block

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Applications of Force Balance Method to Several Metal Forming Problems (성형가공문제에 대한 힘 평형법의 응용)

  • 최재찬;김진무
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.10 no.5
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    • pp.653-660
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    • 1986
  • Two uppor bound solutions, by the force balance method and by a kinematically admissible velocity field, are compared for the metal forming problems in plane strain. It is concluded that these two approaches always give identical results when the geometrical configurations of the deformation model reman the same. By detailed derivations for plastic bending of a notched bar, closed die forging, compression of a rectangular block, machining with a restricted contact tool and plane strain backward extrusion, the identity of both approaches is verified.

A Study on Non-Axisymmetric Ring Forging Using UBET (UBET를 이용한 비축대칭 링 단조에 관한 연구)

  • 배원경;김영호;이종헌;이원희
    • Proceedings of the Korean Society for Technology of Plasticity Conference
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    • 1994.03a
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    • pp.63-70
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    • 1994
  • An upper bound elemental technique(UBET) is applied to predict forging load and die-cavity filling for non-axisymmetric ring forging. The finial product is divided into three different deformation regions. That is axisymmetric part in corner, lateral plane-strain part and shear deformation on boundaries between them. The plane-strain and axisymmetric part are combinded by building block method. Also the total energy is computered through combination of three deformation part. Experiments have been carried out with pure plasticine billets at room temperature. The theoretical predictions of the forging load and the flow pattern are in good agreement with the experimental results.

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MRT (Magneto Resonance Testing) Development and Application for Non-ferrous Metal Products Pore's Defect Detection (자기공명 탐상기술 (MRT)에 의한 비철금속 가공물의 기공 검출)

  • Dong-man Suh;Kwan-hoon Moon
    • Journal of Korea Foundry Society
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    • v.43 no.1
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    • pp.3-10
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    • 2023
  • This study was conducted to develop technology that can detect stomatal defects inside nonferrous metal products that may occur during die casting processes. Through this research, we intend to detect possible pores in the products in advance, block the distribution of defective products, and contribute to reducing possible losses due to damage to distributed products.

Development of Isothermal Pass Schedule Program for the Re-design of a Continuous High Carbon Steel Wire Drawing Process (고탄소강 연속 신선 공정의 재설계를 위한 등온패스스케줄 프로그램의 개발)

  • Kim, Young-Sik;Kim, Dong-Hwan;Kim, Byung-Min;Kim, Min-An;Park, Yong-Min
    • Journal of the Korean Society for Precision Engineering
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    • v.18 no.5
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    • pp.57-64
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    • 2001
  • The high speed in the wire-drawing process to meet the demands for the increased productivity has a great effect on the heat generated due to plastic deformation and friction between the wire and the drawing dies. During the high carbon steel wire drawing process, the temperature rise gives a great influence to the fracture of wire. In this paper, to control the temperature rise in the wire after the deformation through the drawing die, the calculation method of the wire temperature, which includes the temperature rise in the deformation zone as well as the temperature drop in the block considering the heat transfer among the wire, cooling water and surrounding air, is proposed. These calculated results of the wire temperature at the inlet and exit of the drawing die at each pass are compared with the measured wire temperatures and verified its efficiency. So, using the program to predict the wire temperature, the isothermal pass schedule program was developed. By applying this isothermal pass schedule program to the conventional process condition, a new isothermal pass schedule is redesigned through all passes. As a result, the possibility of wire fracture could be considerably reduced and the productivity of final product could be more increased than before.

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A Study on the impact on the quality of hemming the number of hemming process (중소형 회로 차단기에 적용 가능한 한류 메커니즘의 개발)

  • Lee, Je-Duk;Park, Jong-Sik;Im, Jae-Guk;Park, Dong-Hee;Park, Min-Ho;Choi, Kye-Kwang;Kim, Sei-Hwan;Yun, Jae-Woong;Lee, Chun-Kyu
    • Design & Manufacturing
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    • v.10 no.1
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    • pp.41-45
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    • 2016
  • Electrical equipment in factories, buildings, etc. with the development of the industry has become a large capacity. By the development, electric load also become diversified and there is also highly functional requirements being electrical equipment. Particularly in the small and medium-sized circuit breakers, tend to preferentially consider the economy stands out and improvements in safety, ease of mounting and connection through the modularity of the basic dimensions compact and cost to block expansion of the scope of the development of capacity, etc. The product having a competitive has been strongly required. In order to implement the circuit breakers of breaking capacity and compact at the same time taking into account the economic development of this technology applied to the current-limiting mechanism is essential budget or the current limiting mechanism is currently available mechanisms applicable to small and medium-sized frame (frame) can not do it. In this paper, at the same time satisfying the economic efficiency, by minimizing the load force of the moving contactor (moving contactor) to be applied to small and medium frame other hand to secure the economical efficiency without using high speed contact parting acceleration of the moving contactor conventional current-limiting mechanism, and to develop a current-limiting mechanism that can be satisfied with the same or higher performance to meet the needs of the market.

Study of the fracture resistance of zirconia on posterior fixed partial dentures based on inter-abutment distance (지르코니아 고정성 국소의치의 지대치간 거리에 따른 파절저항성에 관한 연구)

  • Park, Gi-Beom;Shin, Soo-Yeon
    • Journal of Dental Rehabilitation and Applied Science
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    • v.36 no.2
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    • pp.61-69
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    • 2020
  • Purpose: Zirconia fixed partial dentures with mandibular 2nd premolar and 2nd molar as abutments are fabricated and then the effects of inter-abutment distance on fracture resistance of zirconia fixed partial dentures is studied. Materials and Methods: The materials used in this study are Cameleon S zirconia block and S2 zirconia block, which are divided into CS Group and S2 Group applying different inter-abutment distance for each material, and the sintered zirconia fixed partial denture was luted to the epoxy resin die using a temporary luting cement, and then the fracture resistance was measured by placing a 6 mm diameter hardened steel ball on the occlusal surfaces of the pontics and applying pressure at a cross head speed of 1.0 mm/min on a universal testing machine with a load cell of 5.0 kN. Results: The fracture resistance of zirconia fixed partial dentures is not significantly affected by inter-abutment distance The fracture resistance of zirconia fixed partial dentures in CS Group was significantly higher in 15 mm of inter-abutment distance than in 13 mm and 17 mm of inter-abutment distance (P < 0.05). The fracture resistance of zirconia fixed partial dentures in S2 Group was not significantly different between the three groups (P > 0.05). Conclusion: The fracture resistance of zirconia fixed partial dentures with mandibular 2nd premolar and 2nd molar as abutments does not significantly affected by the inter-abutment distance.

A Mixed-Signal IC for Magnetic Stripe Storage System (자기 띠 저장 시스템을 위한 혼성 신호 칩)

  • Lim, Shin-Il;Choi, Jong-Chan
    • Journal of IKEEE
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    • v.2 no.1 s.2
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    • pp.34-41
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    • 1998
  • An integrated circuit for magnetic stripe storage system is implemented. All the analog and digital circuits are integrated in one chip. The analog block contains preamplifier, peak detecter, comparator and reference generater. And digital block includes reference window signal generater, up/down counter for F/2F signal measurement, bit-error detection logic, and control logic. Both the encoding and decoding functions for F/2F signal processing are provided. An AGC(automatic gain control) circuit which was included in conventional circuits is eliminated due to optimized circuit design. Misreading prevention circuits are also proposed by fixing up new reference bit when broken bits are detected. The prototype chip is implemented using $0.8{\mu}m$ N-well CMOS technology and operates from 3.3 V to 7.5 V of supply voltage. It occupies a die area of $3.04mm^2(1.6mm{\times}1.9mm)$ and dissipates 8 mW with a 5 V supply voltage.

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Estimation of Sculptured Surface NC Machining Time (자유곡면 NC 절삭가공시간 예측)

  • 허은영;김보현;김동원
    • Korean Journal of Computational Design and Engineering
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    • v.8 no.4
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    • pp.254-261
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    • 2003
  • In mold and die shops, NC machining process mainly affects the quality of the machined surface and the manufacturing time of molds and dies. The estimation of NC machining time is a prerequisite to measure the machining productivity and to generate a process schedule, which generally includes the process sequence and the completion time of each process. It is required to take into account dynamic characteristics in the estimation, such as the ac/deceleration of NC machine controllers. Intensive observations at start and end points of NC blocks show that a minimum feedrate, a key variable in a machining time model, has a close relation to a block distance, an angle between blocks, and a command feedrate. Thus, this study addresses regression models for the minimum feedrate estimation on short and long NC blocks considering these parameters. Furthermore, machining time estimation models by the four types of feedrate behaviors are suggested based on the estimated minimum feedrate. To show the validity of the proposed machining time model, the study compares the estimated with the actual machining time in the sculptured surface machining of several mold dies.

A 3 V 12b 100 MS/s CMOS D/A Converter for High-Speed Communication Systems

  • Kim, Min-Jung;Bae, Hyuen-Hee;Yoon, Jin-Sik;Lee, Seung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.4
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    • pp.211-216
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    • 2003
  • This work describes a 3 V 12b 100 MS/s CMOS digital-to-analog converter (DAC) for high-speed communication system applications. The proposed DAC is composed of a unit current-cell matrix for 8 MSBs and a binary-weighted array for 4 LSBs, trading-off linearity, power consumption, chip area, and glitch energy with this process. The low-glitch switch driving circuits are employed to improve linearity and dynamic performance. Current sources of the DAC are laid out separately from the current-cell switch matrix core block to reduce transient noise coupling. The prototype DAC is implemented in a 0.35 um n-well single-poly quad-metal CMOS technology and the measured DNL and INL are within ${\pm}0.75$ LSB and ${\pm}1.73$ LSB at 12b, respectively. The spurious-free dynamic range (SFDR) is 64 dB at 100 MS/s with a 10 MHz input sinewave. The DAC dissipates 91 mW at 3 V and occupies the active die area of $2.2{\;}mm{\;}{\times}{\;}2.0{\;}mm$

A design of fast switching time, low phase noise PHS frequency synthesizer (빠른 스위칭 시간과 저 위상잡음 특성을 가지는 PHS용 주파수 합성기의 설계)

  • Jung, Sung-Kyu;Jung, Ji-Hoon;Pu, Young-Gun;Kim, Jin-Kyung;Jang, Suk-Hwan;Lee, Kang-Yoon
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.499-500
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    • 2006
  • This paper presents a fast switching CMOS frequency synthesizer with a new coarse tuning method for PHS applications. To achieve the fast lock-time and the low phase noise performance, an efficient bandwidth control scheme is proposed. Charge pump up/down current mismatches are compensated with the current mismatch compensation block. Also, the proposed coarse tuning method selects the optimal tuning capacitances of the LC-VCO to optimize the phase noise and the lock-time. The measured lock-time is about $20{\mu}s$. This chip is fabricated with $0.25{\mu}m$ CMOS technology, and the die area is $0.7mm{\times}2.1mm$. The power consumption is 54mW at 2.7V supply voltage.

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