• KSTLE International Journal
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• v.8 no.1
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• pp.1-6
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• 2007

Chromatic device was developed using light emitting diodes, optic fibers and photodiodes. Chromatic ratio and total contamination parameters based on transmitted light intensity in Red, Green, and Blue wavelengths were used for oil chemical and particulate contamination assessment. Chromatic ratio criterion was found independent of the particulate contamination of oil; but depended on chemical degradation, being more sensitive for synthetic than mineral hydraulic oil. Total contamination index of the sensor depended on both the chemical degradation and particulate contamination of the oil; being most sensitive in blue wavelength, and least in the red. Test results for synthetic hydraulic oils monitored corroborated with results of other tests such as viscosity, total acid number, elemental optical emission spectroscopy, particulate counts and UV-VIS photospectrometry. Chromatic ratio showed a clearer indication of oil degradation, compared to key monitoring parameters such as total acid number, viscosity and particle counts. The results showed that these parameters are effective criteria for the condition monitoring of synthetic hydraulic oils.

• Journal of the Korean Ceramic Society
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• v.52 no.1
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• pp.23-27
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• 2015

Recently, the use of ion-exchange strengthened glass has increased sharply, as it is now used as the cover glass for smart phone devices. Therefore, many researchers are focusing on methods that can be used to strengthen ion-exchange glass. However, research on how the improved strength can be maintained under thermal environment of device manufacturing is still insufficient. We tested the degradation of the characteristics of ion-exchange soda-lime glass samples, including their surface compressive stress characteristics, the depth of the ion-exchange layer (DOL), flexural strength, hardness, and modulus of rupture (MOR) values. Degradation of the characteristics of the ion-exchange glass samples occurred when they were heat-treated at a temperature that exceeded $350^{\circ}C$.

• 전자공학회논문지 IE
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• v.47 no.1
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• pp.1-5
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• 2010

This paper presents new results of the impact of gate structure on hot-carrier-induced performance degradation in SOI low noise amplifier. Circuit simulations were carried out using the measured S-parameters of H--gate and T-gate SOI MOSFETs and Agilent's Advanced Design System (ADS) to compare the performance of H-gate LNA and T-gate LNA before and after stress. We will discuss the figure of merit for the characterization of low noise amplifier in terms of impedance matching (S11), noise figure, and gain as well as the relation between device degradation and performance degradation of LNA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.3
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• pp.309-313
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• 2024

The key to determining the lifetime of OLED device is how much brightness can be maintained. It can be said that there are internal and external causes for the degradation of OLED devices. The most important cause of internal degradation is bonding and degradation in the excited state due to the electrochemical instability of organic materials. The structure of OLED modeled in this paper consists of a cathode layer, electron injection layer (EIL), electron transport layer (ETL), light emission layer, hole transport layer (HTL), hole injection layer (HIL), and anode layer on a glass substrate from top to bottom. It was confirmed that the temperature generated in OLED was distributed around the maximum of 343.15 K centered on the emission layer. It can be seen that the heat distribution generated in the presented OLED structure has an asymmetrically high temperature distribution toward the cathode, which is believed to be because the sizes of the cathode and positive electrode are asymmetric. Therefore, when designing OLED, it is believed that designing the structures of the cathode and anode electrodes as symmetrically as possible can ensure uniform heat distribution, maintain uniform luminance of OLED, and extend the lifetime. The thermal distribution of OLED was analyzed using the finite element method according to Comsol 5.2.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3626-3631
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• 2009

This study has provided some of the first experimental results of NMOSFET hot-carrier degradation for the analog circuit application. After hot-carrier stress under the whole range of gate voltage, the degradation of NMOSFET characteristics is measured in saturation region. In addition to interface states, the evidences of hole and electron traps are found near drain depending on the biased gate voltage, which is believed to the cause for the variation of the transconductance($g_m$) and the output conductance($g_{ds}$). And it is found that hole trap is a dominant mechanism of device degradation in a low-gate voltage saturation region, The parameter degradation is sensitive to the channel length of devices. As the channel length is shortened, the influence of hole trap on the channel conductance is increased. Because the magnitude of $g_m$ and $g_{ds}$ are increased or decreased depending on analog operation conditions and analog device structures, careful transistor design including the level of the biased gate voltage and the channel length is therefore required for optimal voltage gain ($A_V=g_m/g_{ds}$) in analog circuit.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.58-61
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• 2001

Metal-insulator-semiconductor (MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/cm$^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8V, 50% duty cycle) in the 500kHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2335-2340
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• 2012

The detector is an uncooled detector system that functions inside the thermoelectric cooler (TEC) equipped with features instead of the cooler. The function of the thermoelectric device to control the temperature of the detector based on a function of temperature to prevent degradation of image quality to perform the role, the latest technology trend by removing the thermoelectric device size, cost a lot of effort to reduce has been studied. In this paper, It would be proposed of the actual test result using real chamber environment of for the best TECless algorithm as to minimize the degradation of image quality and obtain the low price of the uncooled detector.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.34-39
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• 2014

This paper discusses the 3-level charge pumping (CP) method in planar-type Silicon-Oxide-High-k-Oxide-Silicon (SOHOS) and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) devices to find out the reason of the degradation of data retention properties. In the CP technique, pulses are applied to the gate of the MOSFET which alternately fill the traps with electrons and holes, thereby causing a recombination current Icp to flow in the substrate. The 3-level charge pumping method may be used to determine not only interface trap densities but also capture cross sections as a function of trap energy. By applying this method, SOHOS device found to have a higher interface trap density than SONOS device. Therefore, degradation of data retention characteristics is attributed to the many interface trap sites.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.15-19
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• 2010

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a $0.35\;{\mu}m$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and $1.5\;{\mu}m$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($i_{SUB}$), drain to source leakage current ($i_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.7
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• pp.569-574
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• 2007

In this paper, the reliability (NBTI degradation: ${\Delta}V_{th}$) and device characteristic of nano-scale PMOSFET with plasma nitrided oxide (PNO) is characterized in depth by comparing those with thermally nitrided oxide (TNO). PNO case shows the reduction of gate leakage current and interface state density compared to TNO with no change of the $I_{D.sat}\;vs.\;I_{OFF}$ characteristics. Gate oxide capacitance (Cox) of PNO is larger than TNO and it increases as the N concentration increases in PNO. PNO also shows the improvement of NBTI characteristics because the nitrogen peak layer is located near the $Poly/SiO_2$ interface. However, if the nitrogen concentration in PNO oxide increases, threshold voltage degradation $({\Delta}V_{th})$ becomes more degraded by NBT stress due to the enhanced generation of the fixed oxide charges.