• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.305-308
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• 2004

We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.180-181
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• 2006

As a rule, high temperature superconducting coated conductors have multi-layered buffers consisting of seed, diffusion barrier and cap layers. Multi-buffer layer deposition requires longer fabrication time. This is one of main reasons which increases fabrication cost Thus, single buffer layer deposition seems to be important for practical coated conductor process. In this study, a single layered buffer deposition of $CeO_2$ for low cost coated conductors has been tried using thermal evaporation technique 100nm-thick $CeO_2$ layers deposited by thermal evaporation were found to act as a diffusion layer. $0.4{\mu}m$-thick SmBCO superconducting layers were deposited by thermal co-evaporation on the $CeO_2$ buffered Ni-W substrate. Critical current of 118A/$cm^2$ was obtained for the SmBCO coated conductors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.768-771
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• 2004

Pb0.5,Sr0.5TiO3(PST) thin films were deposited on Si with MgO (100) buffer layer by the alkoxide-based sol-gel method. Structural and dielectric properties of PST thin films for the tunable microwave device applications were investigated. For the MgO/Si buffer layer, the PST thin films exhibited highly (100) orientation. The MgO buffer layer affects the stress state of the (100)-oriented PST thin films. The dielectric constant, tunability, and FOM of the highly (100)-oriented PST thin film increased with increasing annealing temperature due to the decrease in lattice distortion. The differences in dielectric properties may be attributed to the change in the film stress. The dielectric constants, dielectric loss and tunability of the PST thin films deposited on the MgO/Si substrates measured at 10 kHz were 822, 0.025, and 80.1%, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.04a
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• pp.140-142
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• 2003

ZnO thin films are demanded for device applications, so ZnO buffer layer was used to improve for good properties of ZnO thin film. In this study, the structural, electrical and optical properties of ZnO thin films deposited with various buffer thickness was investigated by X-ray diffraction (XRD), Hall measurements, Photoluminescence(PL). ZnO buffer layer and ZnO thin films on sapphire($Al_{2}O_{3}$) substrate have been deposited $200^{\circ}C$ and $400^{\circ}C$ respectively by pulsed laser deposition. It is observed the variety of lattice constant of ZnO thin film by (101) peak position shift with various buffer thickness. It is founded that ZnO thin film with buffer thickness of 20 nm was larger resistivity of 200 factor and UV/visible of 2.5 factor than that of ZnO thin films without buffer layer. ZnO thin films with buffer thickness of 20 nm have shown the most properties.

• 한국금형공학회:학술대회논문집
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• 2008.06a
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• pp.35-38
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• 2008

A pattern master and a Ni stamper for 50nm class of patterns are fabricated through e-beam lithography and Ni electroforming process. A model pattern set is designed, which is based on unit patterns of 50nm, 100nm, 150nm and 200nm in length and 50nm in width. The e-beam process is optimized to fabricate designed patterns with some parameters including dose, accelerating voltage, focal distance and developing time. For Ni electroforming to fabricate Ni stamper, a seed layer, a conducting layer, is deposited first on the pattern master fabricated by an e-beam lithography process. Ni, Ti/Ni and Cr are first tested to find optimal seed layer process. Currently the best result is obtained when adopting Cr deposited to be 100nm thick with continuous tilting motion of the master substrate during the deposition process.

• Korean Journal of Materials Research
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• v.28 no.7
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• pp.405-410
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• 2018

TiN and CrN thin films are among the most used coatings in machine and tool steels. TiN and CrN are deposited by arc ion plating(AIP) method. The AIP method inhibits the reaction by depositing a hard, protective coating on the material surface. In this study, the characteristics of multi-layer(TiN/CrN/TiN(TCT), CrN/TiN/CrN(CTC)) are investigated. For comparison, TiN with the same thickness as the multilayer is formed as a single layer and analyzed. Thin films formed as multilayers are well stacked. The characteristics of micro hardness and corrosion resistance are better than those of single layer TiN. The TiN/CrN peak is confirmed because both TCT and CTC are formed of the same component(TiN, CrN), and the phase is first grown in the (111) direction, which is the growth direction. However, the adhesion and abrasion resistance of the multilayer films are somewhat lower.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.6-12
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• 2013

Aerosol deposition(AD) coating that enable fabricate films at low temperature have begun to be widely researched for the integration of ceramics as well to realize high-speed deposition rates. For application of ceramic thick film by AD to display and electronic ceramic industry, fabrication of dense structure with a no cracking is required. In this study, to fabricate dense ceramic thick film, the effect of crystal phase of starting powder was investigated. For this study, amorphous and crystalline $SiO_2$ powders were used as starting powders. Two types of $SiO_2$ powders were deposited on glass substrate by AD. In the case of amorphous $SiO_2$ powder, the deposited films had extremely incompact and opaque layer, irrespective of particle size. In contrast to amorphous powder, in the case of crystalline powder, porous structure layer and dense microstructure with no cracking layer were fabricated depending on the particle size. The optimized starting powder size for dense coating layer was $1{\sim}2{\mu}m$. The transmittance of film reached a maximum of 76% at 800 nm.

• Korean Journal of Crystallography
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• v.13 no.2
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• pp.57-62
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• 2002

Time-of-flight impact-collision ion scattering spectroscopy (TOF-ICISS) was applied to study the geometrical structure of epitaxially grown TiO layers on a MgO(001) surface. The hetero-epitaxial TiO layer was deposited by thermal evaporation of titanium onto the MgO(001) surface and subsequent exposure to oxygen at 400℃. The well-ordered TiO structure was confirmed with the 1×1 RHEED pattern. TOF-ICISS results revealed that the TiO layer was formed at the on-top sites of the MgO(001) substrate and that the lateral lattice constant of TiO layer was the same as that of the MgO substrate. The surface of the deposited epitaxial TiO layer was smooth without the three dimensional islands.

• Korean Journal of Metals and Materials
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• v.48 no.1
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• pp.90-100
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• 2010

Micro-conductive patterns were microfabricated on an insulating substrate ($SiO_2$) surface by a selective electroless nickel plating process in order to investigate the formation of seed layers. To fabricate micro-conductive patterns, a thin layer of metal (Cu.Cr) was deposited in the desired micropattern using laser-induced forward transfer (LIFT). and above this layer, a second layer was plated by selective electroless plating. The LIFT process. which was carried out in multi-scan mode, was used to fabricate micro-conductive patterns via electroless nickel plating. This method helps to improve the deposition process for forming seed patterns on the insulating substrate surface and the electrical conductivity of the resulting patterns. This study analyzes the effect of seed pattern formation by LIFT and key parameters in electroless nickel plating during micro-conductive pattern fabrication. The effects of the process variables on the cross-sectional shape and surface quality of the deposited patterns are examined using field emission scanning electron microscopy (FE-SEM) and an optical microscope.

• Journal of Sensor Science and Technology
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• v.31 no.6
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• pp.366-370
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• 2022

A 12 ㎛ pixel-sized 360 × 240 microbolometer focal plane array (MBFPA) was fabricated using a complementary metaloxide-semiconductor (CMOS)-compatible process. To release the MBFPA membrane, an amorphous carbon layer (ACL) processed at a low temperature (<400 ℃) was deposited as a sacrificial layer. The thermal time constant of the MBFPA was improved by using serpentine legs and controlling the thickness of the SiNx layers at 110, 130, and 150 nm on the membrane, with response times of 6.13, 6.28, and 7.48 msec, respectively. Boron-doped amorphous Si (a-Si), which exhibits a high-temperature coefficient of resistance (TCR) and CMOS compatibility, was deposited on top of the membrane as an IR absorption layer to provide heat energy transformation. The structural stability of the thin SiNx membrane and serpentine legs was observed using field-emission scanning electron microscopy (FE-SEM). The fabrication yield was evaluated by measuring the resistance of a representative pixel in the array, which was in the range of 0.8-1.2 Mohm (as designed). The yields for SiNx thicknesses of SiNx at 110, 130, and 150 nm were 75, 86, and 86%, respectively.