• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1169-1171
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• 2004

Voltage source inverters are required dead time to prevent the short current in the dc link. In recent years, the dead time effect has been investigated in many literatures. This paper presents on the novel space vector PWM inverter without dead time. The proposed inverter don't need to sense load current and to calculate for dead time compensation. Transformers are inserted each leg in the proposed inverter. The proposed method is analyzed each mode and then the simulation results verify the proposed method.

• 제어로봇시스템학회논문지
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• 제11권2호
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• pp.93-102
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• 2005

The Nyquist robust stability margin is proposed as a measure of robust stability for systems with Affine TFM(Transfer Function Matrix) parametric uncertainty. The parametric uncertainty is modeled through a Affine TFM MIMO (Multi-Input Multi-Output) description with dead-time, and the unstructured uncertainty through a bounded perturbation of Affine polynomials. Gershgorin's theorem and concepts of diagonal dominance and GB(Gershgorin Bands) are extended to include model uncertainty. Multiloop PI/PID controllers can be tuned by using a modified version of the Ziegler-Nichols (ZN) relations. Consequently, this paper provides sufficient conditions for the robustness of Affine TFM MIMO uncertain systems with dead-time based on Rosenbrock's DNA. Simulation examples show the performance and efficiency of the proposed multiloop design method for Affine uncertain systems with dead-time.

• 전력전자학회논문지
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• 제26권1호
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• pp.59-65
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• 2021

This study proposes a dead-time implementation method suitable for cell voltage control of a cascaded H-bridge (CHB) inverter. The PWM module of an existing microcontroller cannot generate a maximum voltage due to the dead-time effect when used as the cell controller of the CHB inverter. In the proposed method, the operation method of the PWM module was changed without using the dead time module included in the existing microcontroller, so that the cell output voltage can be increased to the maximum voltage without voltage discontinuity. During the maximum voltage generation period, the full turn-on state can be maintained without unnecessary switching. The validity of the proposed method is confirmed through an experiment.

• 전력전자학회논문지
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• 제20권2호
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• pp.115-121
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• 2015

Stand-alone inverter supplies constant voltage to loads. However, when a three-phase stand-alone inverter supplies unbalanced load, the generated output voltages also become unbalanced. The nonlinear characteristics of inverter dead time cause a more serious distortion in the output voltage. With unbalanced load, voltage distortion caused by dead time differs from voltage distortion under balanced load. Phase voltages in the stationary reference frame include unbalanced odd harmonics and then, d-q axis voltages in the synchronous reference frame have even harmonics with different magnitude, which are mitigated by the proposed multiple resonant controller. This study analyzes the voltage distortion caused by unbalanced load and dead time, and proposes a novel dead time compensation method. The proposed control method is tested on a 10-kW stand-alone inverter system, and shows that total harmonic distortion (THD) is reduced to 1.5% from 4.3%.

• 전력전자학회논문지
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• 제17권3호
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• pp.213-221
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• 2012

In a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive, a dead time is inserted to prevent a breakdown of switching device caused by the short-circuit of DC link. This distorts the inverter output voltage resulting in a current distortion and torque ripple. In addition to the dead time, nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The voltage disturbance caused by the dead time and inverter nonlinearity directly influences on the inverter output performance, and it is known to be more severe at low speed. In this paper, a new compensation scheme for the dead time and inverter nonlinearity under the parameter variation is proposed for a PWM inverter-fed IPMSM drive. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments.

• 전기학회논문지
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• 제66권1호
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• pp.55-60
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• 2017

Capacitor Charging Power Supply(CCPS) is one of the most important components of a pulsed power system. The CCPS is widely used in source of lasers, accelerators and plasma generators. This paper presents design of a dead time control circuit and operation characteristics for stable high repetition rate of high voltage CCPS. The CCPS consists of battery, high voltage transformer and controller with a dead time control circuit. A dead time control circuit was simulated by PSpice. The performance test of the CCPS was carried out with a 7[nF] load capacitor at output voltage of 50[kV] and a pulse repetition frequency of 100[Hz]. As a result, we can verify that charging and discharging waveform is stable at 100[Hz]. The experiment results indicate that 3[ms] dead time made it possible for stable high repetition rate of 100[Hz]. This paper paves the way for designing an advanced CCPS which is more applicable outside experiments.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.425-428
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• 2000

A new dead time compensation method using time delay control approach is presented. The dead time in switching pattern cause the voltage distortion and it can be considered as the disturbance voltage. In this paper the disturbance voltage is estimated using time delay control and the estimated disturbance voltage is summed with voltage command in predictive current control by a feed-forward. The proposed scheme is implemented on a PMSM and the effectiveness is verified through comparative simulation.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.155-159
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• 2001

In this paper, an on-line dead-time compensation method based on a time delay control approach is presented. The disturbance voltages caused by the dead time are estimated in an on-line manner by the time delay control without any additional circuits and off-line experimental measurements. And the estimated disturbance voltages are fed to voltage references in order to compensate the dead-time effects. The proposed method is applied to a PM synchronous motor drive system and implemented by using software of a digital signal processor (DSP) TMS320C31. Experiments are carried out for this system and the results well demonstrate the effectiveness of the proposed method.

• Nuclear Engineering and Technology
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• 제3권1호
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• pp.3-7
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• 1971

$Mn^{56}$ 방사성 물질을 이용하여 방사능 측정계수율에 따라 변화되는 한 가이가 검출기의 불감시간을 결정하는 방법을 탐구하였다. (equation omitted)는 이 검출기의 불감시간과 방사능 측정계수율과의 한 관계를 결정 할 수 있는 유용한 공식으로 생각되었다. 여기에서 (equation omitted)(N$_1$)는 방사능 측정계수율 N$_1$에 대한 불감시간이며 N$_1$은 첫 측정시각(이 시각을 0시로 잡는다)에서 방사능측정계수율이고 Nt는 첫 측정시각으로부터 t라는 시간후에 얻어진 계수율이며 λ는 방사능 붕괴상수이고 t는 두 측정시각의 시간차를 의미한다. 이 공식에 의하여 얻어진 불감시간에 따라 모든 방사능 측정자료를 교정하고 시간에 따른 그 계수율의 변화를 관찰한 결과 이미 보고된 $Mn^{56}$ 방사능 붕괴형식을 잘따르고 있음을 보여 주었다. 한편 이 공식을 이용한 결과를 보면 방사능 계수율 대 불감시간과의 관계로부터 얻은 불감시간은 방사능 측정계수율이 증가함에 따라 감소현상을 나타냈다.

• 전기전자학회논문지
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• 제26권2호
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• pp.271-279
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• 2022

본 논문은 플로팅 커패시터를 갖는 이중 인버터의 향상된 데드 타임 보상 기법을 제안한다. 플로팅 커패시터를 갖는 이중 인버터는 2-레벨 단일 인버터보다 전력 반도체가 6개가 추가된다. 전력 반도체의 수가 증가로 이중 인버터의 출력 전압은 추가된 전력 반도체의 도통 전압만큼 감소되며 출력 전류 품질은 전력 반도체에 의한 전압 강하와 데드 타임에 의해 저하된다. 본 논문에서 제안하는 기법은 이중 인버터의 데드 타임 및 전력 반도체의 도통 전압을 보상하여 전류 품질을 개선하고 추가적인 대역통과 필터를 이용한 고조파 보상 기법을 통해 데드 타임과 도통 전압 보상에 대한 오차를 추가 보상한다.