• Proceedings of the Korean Society of Precision Engineering Conference
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• 1996.04a
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• pp.383-387
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• 1996

This paper presents a steering control strategy applicable to vehicle path following problems. This control strategy is based on realistic nonlinear equations of motion of multibody systems described in terms of relative joint coordinates. The acceleration of the steering angle is selected as a control input of the system. This input is obtained by considering position and slope errors at current and at advance times. This steering control strategy is tested in circular and lane change maneuvers with a nonlinear vehicle model.

• Transactions of Materials Processing
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• v.9 no.3
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• pp.265-273
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• 2000

The conventional and new forging processes of the power steering worm blank are analyzed by the rigid-plastic finite element method. The conventional process contains three stages such as indentation, extrusion and upsetting, which was designed by a forming equipment expert. Process conditions such as reduction in area, semi-die angle and upsetting ratio are considered to prevent internal or geometrical defects. The results of simulation of the conventional forging process are summarized in terms of deformation patterns, load-stroke relationships and die pressures for each forming operation. Based on the simulation results of the current three-stage, the power steering worm blank forging process for improving the conventional process sequence is designed. Die pressures and forming loads of proposed process are within limit value which is proposed by experts and the proposed process is found to be proper for manufacturing the power steering worm blank.

• Transactions on Electrical and Electronic Materials
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• v.10 no.2
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• pp.44-48
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• 2009

A simulation study of a 10-bit two-stage DAC was done by using a conventional current switch cell. The DAC adopts the segmented architecture in order to reduce the circuit complexity and the die area. The 10-bit CMOS DAC was designed in 2 blocks, a unary cell matrix for 6 MSBs and a binary weighted array for 4 LSBs, for fabrication in a 0.35-${\mu}m$ CMOS process. To cancel the accumulation of errors in each current cell, a symmetrical switching sequence is applied in the unary cell matrix for 6 MSBs. To ensure high-speed operation, a decoding circuit with one stage latch and a cascode current source were developed. Simulations show that the maximum power consumption of the 10-bit DAC is 74 mW with a sampling frequency of 100 MHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.270-277
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• 2012

This paper presents a new DAC design strategy to achieve a wideband dynamic linearity by increasing the bandwidth of the output impedance. In order to reduce the dominant parasitic capacitance of the conventional matrix structure, all the cells associated with a unit current source and its control are stacked in a single column very closely (stacked unit cell structure). To further reduce the parasitic capacitance, the size of the unit current source is considerably reduced at the sacrifice of matching yield. The degraded matching of the current sources is compensated for by a self-calibration. A prototype 6-bit 3.3-GS/s current-steering full binary DAC was fabricated in a 1P9M 90 nm CMOS process. The DAC shows an SFDR of 36.4 dB at 3.3 GS/s Nyquist input signal. The active area of the DAC occupies only $0.0546mm^2$ (0.21 mm ${\times}$ 0.26 mm).

• ETRI Journal
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• v.35 no.1
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• pp.158-161
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• 2013

This letter proposes a low-power current-steering digital-to-analog converter (DAC). The proposed DAC reduces the clock power by cutting the clock signal to the current-source cells in which the data will not be changed. The 10-bit DAC is implemented using a $0.13-{\mu}m$ CMOS process with $V_{DD}$=1.2 V. Its area is $0.21\;mm^2$. It consumes 4.46 mW at a 1-MHz signal frequency and 200-MHz sampling rate. The clock power is reduced to 30.9% and 36.2% of a conventional DAC at 1.25-MHz and 10-MHz signal frequencies, respectively. The measured spurious free dynamic ranges are 72.8 dB and 56.1 dB at 1-MHz and 50-MHz signal frequencies, respectively.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.658-663
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• 2005

This paper presents the steering control algorithm of a locomotion robot using a quaternion. The locomotion robot is to be moved on an irregular floor that can inevitably result in the errors of both position and orientation. Especially the orientation error should be compensated every work in order to adjust the misaligned values of current orientation to those commanded values. In this paper, we propose a new steering control algorithm between the two values by using a quaternion with spherical cubic interpolation. The proposed algorithm is shown to be effective in terms of vibration when compared to a conventional simple compensation without interpolation, by using $MATLAB^{(R)}$ and $VisualNastran4D^{(R)}$.

• Journal of information and communication convergence engineering
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• v.20 no.3
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• pp.195-203
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• 2022

Noise generated during image acquisition and transmission can negatively impact the results of image processing applications, and noise removal is typically a part of image preprocessing. Denoising techniques combined with nonlocal techniques have received significant attention in recent years, owing to the development of sophisticated hardware and image processing algorithms, much attention has been paid to; however, this approach is relatively poor for edge preservation of fine image details. To address this limitation, the current study combined a steering kernel technique with adaptive masks that can adjust the size according to the noise intensity of an image. The algorithm sets the steering weight based on a similarity comparison, allowing it to respond to edge components more effectively. The proposed algorithm was compared with existing denoising algorithms using quantitative evaluation and enlarged images. The proposed algorithm exhibited good general denoising performance and better performance in edge area processing than existing non-local techniques.

• Asian Pacific Journal of Cancer Prevention
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• v.17 no.sup1
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• pp.31-36
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• 2016

Scientific evidence on all aspects of smoking amongst youth is very important for designing appropriate interventions to reduce smoking among this vulnerable population. This paper describes current access to anti-smoking information among school children aged 13 to 15 years in Vietnam in 2014 and examines its potential impact on preventing smoking initiation. The data used in this paper were obtained from the 2014 Global Youth Tobacco Survey (GYTS) in Vietnam. Students were asked questions about their level of awareness of anti-smoking information from various sources in the past 30 days and about lessons in school regarding the dangers of tobacco use during the last 12 months. Those who have never smoked were asked "whether or not they thought about avoiding cigarettes because of health warnings on cigarette packages" and answers were analyzed in combination with data on access to anti-smoking information from other sources. The prevalence of exposure to antismoking campaigns was high among school children in Viet Nam: 55.3% of current smokers reported thoughts of smoking cessation because of health warnings on cigarette packages; 60.5% of never smokers avoided initiating smoking because of the same health warnings. The potential impact of graphic health warnings to prevent school-aged children from smoking initiation would be stronger if there was concurrent access to anti-smoking programs on the dangers of tobacco use in schools. However, school education for tobacco prevention and control has not been as strong as expected. A more comprehensive school curriculum on tobacco prevention and control is recommended to reinforce antismoking messages among school children.

• The Journal of Korea Robotics Society
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• v.18 no.3
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• pp.251-259
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• 2023

In the path traveling of differential-drive robots, the steering controller plays an important role in determining the path-following performance. When a robot with a pure-pursuit algorithm is used to continuously drive a right-angled driving path in an unstructured environment without turning in place, the robot cannot accurately follow the right-angled path and stops driving due to the ground and motor load caused by turning. In the case of pure-pursuit, only the current robot position and the steering angle to the current target path point are generated, and the steering component does not reflect the speed plan, which requires improvement for precise path following. In this study, we propose a driving algorithm for differentially driven robots that enables precise path following by planning the driving speed using the radius of curvature and fusing the planned speed with the steering angle of the existing pure-pursuit controller, similar to the Model Predict Control control that reflects speed planning. When speed planning is applied, the robot slows down before entering a right-angle path and returns to the input speed when leaving the right-angle path. The pure-pursuit controller then fuses the steering angle calculated at each path point with the accelerated and decelerated velocity to achieve more precise following of the orthogonal path.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.33-38
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• 2017

In this paper, a 4-channel common-cathode VCSEL diode driver array with 3.125 Gb/s per channel operation speed is realized. In order to achieve faster speed of the switching main driver with relatively large transistors, the transmitter array chip consists of a pre-amplifier with active inductor stage and also an input buffer with modified equalizer, which leads to bandwidth extension and reduced current consumption. The utilized VCSEL diode provides inherently 2.2 V forward bias voltage, $50{\Omega}$ resistance, and 850 fF capacitance. In addition, the main driver based upon current steering technique is designed, so that two individual current sources can provide bias currents of 3.0 mA and modulation currents of 3.3 mA to VCSEL diodes. The proposed 4-channel VCSEL driver array has been implemented by using a $0.11-{\mu}m$ CMOS technology, and the chip core occupies the area of $0.15{\times}0.18{\mu}m^2$ and dissipates 22.3 mW per channel.