• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.727-730
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• 2005

In this paper, we propose a new current sense amplifier for low-voltage, high-speed SRAM. As a supply voltage is reduced, a sensing delay is increased owing to reduced cell read current. It causes a low-speed operation in SRAM. To overcome this problem, we present a new current sense amplifier which consists of the current-mirror type circuit with feedback structure. For demonstration, a 0.8-V, 256-Kb SRAM incorporating the proposed current sense amplifier has been designed with $0.18-{\mu}m$ CMOS technology. The simulation results show 15.6ns of the sensing delay reduction in comparison with a previous current sense amplifier and 11.5ns of the sensing delay reduction in comparison with a voltage sense amplifier.

• 동력기계공학회지
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• 제10권4호
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• pp.147-152
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• 2006

The current type amplifier is the device that is used for an actuator as the motor's torque controller. However, it is too difficult to select the parameter value that has the desired output because the current type amplifier's transfer function is too complex. This study concern about the design of the current type amplifier with the desired output. From the modeled transfer function of the current type amplifier, the optimal parameter values of the transfer function can be selected in order to have the desired output using the Real Coded Genetic Algorithm(RCGA). The real circuit is made with the selected parameter value. The step response of the real circuit is in good agreement with the desired step response.

• Progress in Superconductivity
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• 제5권1호
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• pp.31-37
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• 2003

Wide-bandwidth SQUID current amplifier and its control electronics have been constructed for detecting pulse outputs of a superconducting microcalorimeter. The current amplifier made of a double relaxation oscillation SQUID (DROS) has a bandwidth of 1.2 MHz and typical white noise level of about 6 pA/(equation omitted) Hz. To increase the dynamic range of the current amplifier, the flux-locked loop (FLL) has additional circuits to reset the integrator and to count reset numbers which present the number of passed flux quanta. In this system, dynamic range covers from -65 mA to +65 mA. SQUID electronics are controlled by software to get the optimum FLL condition, and to control the current to bias the transition edge sensor (TES). The electronics are shielded from the outside electromagnetic noises by using an aluminum case of 66 mm ${\times}$ 25 mm ${\times}$ 100 mm, and consist of 2 separate printed-circuit-boards for the current amplifier and the control electronics, respectively. The SQUID current amplifier and its control electronics will be used in TESs for detecting photons such as UV and X-ray with high energy resolution.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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• pp.13-16
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• 2000

This paper presents a simple class-D stereo amplifier using 3-phase full bridge circuit configurations which is controlled by a new current control switching method. Although this class-D amplifier has an only one current control loop with the proposed switching method, a good performance can be obtained. In this paper, a strategy for driving stereo signal amplifier with 3-phase full bridge is discussed. With the experimental results, usefulness of the proposed amplifier is confirmed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.289-292
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• 2001

A Novel fully-differential bipolar current-controlled current amplifier(CCCA) for electrically tunable circuit design at current-mode signal processing were designed. The CCCA was consisted of fully-differential subtracter and fully-differential current gain amplifier. The simulation result shows that the CCCA has current input impedance of 0.5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100$mutextrm{A}$ to 20 ㎃. The power dissipation is 3 mW.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.469-472
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• 2004

In this paper a current mode sense amplifier suitable for 30nm SONOS flash memories read operation is presented. The proposed sense amplifier employs cross coupled latch type circuit and current mirror to amplify signal from selected memory cell. This sense amplifier provides fast response in low voltage and low current dissipation. Simulation results show the sensing delay time and current dissipation for power supply voltages Vdd to expose limitations of the sense amplifier in various operating conditions.

• 전자공학회논문지
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• 제54권2호
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• pp.53-57
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• 2017

본 논문에서는 의료 기기용 401MHz - 406MHz MedRadio 대역에서 사용하는 저잡음 증폭기를 제안한다. 제안한 저잡음 증폭기는 전류 재사용 gm-boosting 기술을 이용한 공통 게이트 증폭기 구조를 채택하여 기존의 gm-boosted 공통 게이트 증폭기에 비해 동일한 전력소모에서 더 높은 전압 이득과 더 낮은 잡음 지수 특성을 얻었다. 제안한 전류 재사용 gm-boosted 저잡음 증폭기는 $0.13{\mu}m$ CMOS 공정을 사용하여 설계하였고, 22 dB의 전압 이득, 2.95 dB의 잡음 지수, -17 dBm의 IIP3 특성을 보이며, 공급 전압 0.5 V에서 $170{\mu}W$의 전력을 소비한다.

• 전력전자학회논문지
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• 제6권1호
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• pp.13-20
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• 2001

본 논문에서는 큰 출력 저항파 기준 전류와의 정합 특성이 우수한 새로운 전류 미러를 제안한다. CMOS 증폭기 회로에서 전원 전압이 작아지는 경우 출럭 전압의 스윙 폭이 전원 전압에 의해 제한되는 단점이 있으므로 제안된 회로는 이런 단점을 해결하기 위해 출력단의 스윙을 키우고, 안정된 동작올 할 수 있도록 한다. 출력단 부하가 큰 경우에 구동 능력을 증대시키고, 작은 전원 전압을 가질 때에도 큰 출력 스윙을 갖는 전류 미러를 시뮬레이션을 통해 가존의 캐스코드 전류 미러와 Regulated 전류 미러의 특성을 비교 및 고찰한다.

• 전자공학회논문지A
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• 제33A권12호
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• pp.104-109
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• 1996

A current-controlling transadmittance amplifier is proposed. It consists of a linear transadmittor and a current gain cell followed by three current mirrors. The proposed transadmittance amplifier is used to design a current-controlling frequency-dependent negative resistor (FDNR). Experimental results are presented to verify theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

• ETRI Journal
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• 제34권6호
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.