• Journal of the Korean Mathematical Society
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• v.55 no.2
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• pp.343-372
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• 2018

Let K be an imaginary quadratic field with ring of integers ${\mathcal{O}}_K$. Let E be an elliptic curve with complex multiplication by ${\mathcal{O}}_K$, and let $h_E$ be the Weber function on E. Let $N{\in}\{2,3,4,6\}$. We show that $h_E$ alone when evaluated at a certain N-torsion point on E generates the ray class field of K modulo $N{\mathcal{O}}_K$. This would be a partial answer to the question raised by Hasse and Ramachandra.

• ETRI Journal
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• v.28 no.6
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• pp.745-760
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• 2006

In this paper, we particularly deal with no $F_p$-rational two-torsion elliptic curves, where $F_p$ is the prime field of the characteristic p. First we introduce a shift product-based polynomial transform. Then, we show that the parities of (#E - 1)/2 and (#E' - 1)/2 are reciprocal to each other, where #E and #E' are the orders of the two candidate curves obtained at the last step of complex multiplication (CM)-based algorithm. Based on this property, we propose a method to check the parity by using the shift product-based polynomial transform. For a 160 bits prime number as the characteristic, the proposed method carries out the parity check 25 or more times faster than the conventional checking method when 4 divides the characteristic minus 1. Finally, this paper shows that the proposed method can make CM-based algorithm that looks up a table of precomputed class polynomials more than 10 percent faster.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1188-1193
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• 2004

So far, there have been grossly 3 types of studies on GF(2m) multiplier architecture, such as serial multiplication, array multiplication, and hybrid multiplication. Serial multiplication method was first suggested by Mastrovito (1), to be known as the basic CF(2m) multiplication architecture, and this method was adopted in the array multiplier (2), consuming m times as much resource in parallel to extract m times of speed. In 1999, Paar studied further to get the benefit of both architecture, presenting the hybrid multiplication architecture (3). However, the hybrid architecture has defect that only complex ordo. of finite field should be used. In this paper, we propose a novel approach on developing serial multiplier architecture based on Mastrovito's, by modifying the numerical formula of the polynomial-basis serial multiplication. The proposed multiplier architecture was described and implemented in HDL so that the novel architecture was simulated and verified in the level of hardware as well as software. The implemented GF(2m) multiplier shows t times as fast as the traditional one, if we modularized the numerical expression by t number of parts.

• Bulletin of the Korean Mathematical Society
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• v.44 no.4
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• pp.683-689
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• 2007

Let $\mathcal{B}$ be a certain Banach space consisting of analytic functions defined on a bounded domain G in the complex plane. Let ${\varphi}$ be an analytic polynomial or a rational function and let $M_{\varphi}$ denote the operator of multiplication by ${\varphi}$. Under certain condition on ${\varphi}$ and G, we characterize the commutant of $M_{\varphi}$ that is the set of all bounded operators T such that $TM_{\varphi}=M_{\varphi}T$. We show that $T=M_{\Psi}$, for some function ${\Psi}$ in $\mathcal{B}$.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.9
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• pp.18-26
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• 1993

This paper presents a multiplier free technique for the complex DFT by rotations and additions based on the complex approximation of the ring of algebraic integers. Speeding-up the computation time and reducing the dynamic range growth has been achieved by the elimination of multiplication. Moreover the DFT of no twiddle factor quantization errors is possible. Numerical examples are given to prove the algorithm and the applicable size of the DFT is 16 has been concluded.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.5
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• pp.2680-2700
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• 2017

Finite field arithmetic over GF($2^m$) is used in a variety of applications such as cryptography, coding theory, computer algebra. It is mainly used in various cryptographic algorithms such as the Elliptic Curve Cryptography (ECC), Advanced Encryption Standard (AES), Twofish etc. The multiplication in a finite field is considered as highly complex and resource consuming operation in such applications. Many algorithms and architectures are proposed in the literature to obtain efficient multiplication operation in both hardware and software. In this paper, a modified serial multiplication algorithm with interleaved modular reduction is proposed, which allows for an efficient realization of a sequential polynomial basis multiplier. The proposed sequential multiplier supports multiplication of any two arbitrary finite field elements over GF($2^m$) for generic irreducible polynomials, therefore made versatile. Estimation of area and time complexities of the proposed sequential multiplier is performed and comparison with existing sequential multipliers is presented. The proposed sequential multiplier achieves 50% reduction in area-delay product over the best of existing sequential multipliers for m = 163, indicating an efficient design in terms of both area and delay. The Application Specific Integrated Circuit (ASIC) and the Field Programmable Gate Array (FPGA) implementation results indicate a significantly less power-delay and area-delay products of the proposed sequential multiplier over existing multipliers.

• Bulletin of the Korean Mathematical Society
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• v.26 no.1
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• pp.11-17
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• 1989

In [1], Johnson and Lapidus introduced a family { $A_{t}$ :t>0} of Banach algebras of functionals on Wiener space and showed that for every F in $A_{t}$ , the analytic operator-valued function space integral $K_{\lambda}$$^{t}$ (F) exists for all nonzero complex numbers .lambda. with nonnegative real part. In [2,3] Johnson and Lapidus introduced a noncommtative multiplication having the property that if F.mem. $A_{t}$ $_{1}$ and G.mem. $A_{t}$ $_{2}$ then $F^{*}$G.mem. A$t_{1}$+$_{t}$ $_{2}$ and (Fig.) Note that for F, G in $A_{t}$ , $F^{*}$G is not in $A_{t}$ but rather is in $A_{2t}$ and so the multiplication * is not internal to the Banach algebra $A_{t}$ . In this paper we introduce an internal noncommutative multiplication on $A_{t}$ having the property that for F, G in $A_{t}$ , F G is in $A_{t}$ and (Fig.) for all nonzero .lambda. with nonnegative real part. Thus is an auxiliary binary operator on $A_{t}$ .TEX> .

• Journal for History of Mathematics
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• v.20 no.3
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• pp.59-72
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• 2007

In this paper we find the germ of geometric interpretation of complex number in the Euclid Element and try to show the evolution of geometric interpretation of complex number by through Descarte, Wallis, Vessel. As a result, relations and differences between them are found. They related line with complex number and interpreted complex number geometrically by generalizing the multiplication operation.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.11-20
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• 1998

High-speed complex-number arithmetic units are essential to baseband signal processing of modern digital communication systems such as channel equalization, timing recovery, modulation and demodulation. In this paper, a new complex-number multiplication algorithm is proposed, which is based on redundant binary (RB) arithmetic combined with radix-4 Booth recoding scheme. The proposed algorithm reduces the number of partial product by one-half as compared with the conventional direct method using real-number multipliers and adders. It also leads to a highly parallel architecture and simplified circuit, resulting in high-speed operation and low power dissipation. To demonstrate the proposed algorithm, a prototype complex-number multiplier-accumulator (CMAC) core with 10-bit operands has been designed using 0.8-$\mu\textrm{m}$ N-Well CMOS technology. The designed CMAC core contains about 18,000 transistors on the area of about 1.60 ${\times}$ 1.93 $\textrm{mm}^2$. The functional and speed test results show that it can operate with 120-MHz clock at V$\sub$DD/=3.3-V, and its power consumption is given to about 63-mW.

• Journal of the Korean Mathematical Society
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• v.38 no.2
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• pp.297-309
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• 2001

White noise distribution theory over the complex Gaussian space is established on the basis of the recently developed white noise operator theory. Unitarity condition for a white noise operator is discussed by means of the operator symbol and complex Gaussian integration. Concerning the overcompleteness of the exponential vectors, a coherent sate representation of a white noise function is uniquely specified from the diagonal coherent state representation of the associated multiplication operator.