• Title/Summary/Keyword: channel junction

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Hydrodynamic Characteristics of Stratified Flow at a Y-Junction (Y자형 혼합지점에서의 성층류유동 특성)

  • ;;Lee, Sang Yong
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.19 no.12
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    • pp.3360-3371
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    • 1995
  • Hydrodynamic characteristics of a stratified flow at a Y-junction were examined analytically. Gas is supplied through the main horizontal channel and liquid is introduced into the gas stream from the Y-shaped bottom branch. Analysis was performed with irrational flow and inviscid fluid assumptions. The Stokes' inverse transformation technique was adopted to convert the real x-y plane into the x-.psi. plane. The potential flow equation was solved numerically in the transformed (x-.psi.) plane and the interface profile, pressure distribution and the streamlines were obtained. The effects of the inlet conditions, injection angle and the gravity on the flow characteristics were also examined. To check the validity of the present method, the previous resultant the two-dimensional obtuse wedge flow was compared. The inverse transformation technique turned out to be also very useful to predict the hydrodynamic characteristics of a stratified flow with the pressure variation at a Y-shaped mixing junction.

PIV Measurements of the Pressure Driven Flow Inside a T-Shaped Microchannel Junction (T헝 마이크로채널 연결부 압력구동 유동의 PIV계측)

  • Choi Jayho;Lee In-Seop
    • Journal of the Korean Society of Visualization
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    • v.1 no.1
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    • pp.75-81
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    • 2003
  • A custom micro-PIV optics assembly has been used to measure the flow fold inside a T-junction of a microchannel. The micro-PIV system consists of microscope objectives of various magnifications, a dichroic cube, and an 8-bit CCD camera. Fluorescent particles of diameters 620 nm have been used with a Nd:YAG laser and color filters. A programmable syringe pump with Teflon tubings were used to inject particle-seeded distilled water into the channel at flow rates of 2.0, 4.0, 6.0 mL/hr. The micro-channels are fabricated with PDMS with a silicon mold, then O$_{2}$ -ion bonded onto a slide glass. Results show differences in flow characteristics and resolution according to fluid injection rates, and magnifications, respectively. The results include PIV data with vector-to-vector distances of 2 $\mu$m with 32 pixel-square interrogation windows at 50$\%$ overlap.

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Impact Analysis of Different Form on Drainability at River Confluence Area (하천합류부 구조에 따른 배수능력 해석)

  • An, ShanFu;Chen, Guoxin;Chun, Do-Seok;Jee, Hong-Kee
    • 한국방재학회:학술대회논문집
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    • 2007.02a
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    • pp.624-627
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    • 2007
  • There are many channel confluences existing in natural river systems, where the hydraulics are very complex because of the interactive between tributary and main river The RMA-2 model Is applied in this paper to model the confluence between Uksu Chun subriver and Nam Chun main river. Based on three types of assumed confluence forms, the model resuits present the hydraulics at channel confluence can be divided into several zones including a zone of separation immediately downstream of the junction branch channel, a maximum and minimum velocity region at upstream and downstream in the confluent channel, and a shear plane developed between the two combing flows at downstream of confluent channel. And the different types of confluent forms performs a very high effect on drainability of tributary, so it is very necessary to design a reasonable confluent forms.

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Investigation on Contact Resistance of Amorphous Indium Gallium Zinc Oxide Thin Film Transistors with Various Electrodes by Transmission Line Method

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.3
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    • pp.139-141
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    • 2015
  • Contact resistance of interface between the channel layers and various S/D electrodes was investigated by transmission line method. Different electrodes such as Ti/Au, a-IZO, and multilayer of a-IGZO/Ag/a-IGZO were compared in terms of contact resistance, using the transmission line model. The a-IGZO TFTs with a-IGZO/Ag/a-IGZO of S/D electrodes showed good performance and low contact resistance due to the homo-junction with channel layer.

Micro-PIV Measurement on the droplet formation in a microfluidic channel (미세유체소자 내부에서의 Droplet 형성에 대한 Micro-PIV 측정)

  • Yoon, Sang-Youl;Ko, Choon-Sik;Kim, Jae-Min;Kim, Kyung-Chun
    • Proceedings of the KSME Conference
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    • 2004.11a
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    • pp.1534-1539
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    • 2004
  • This experiment has been carried out to measure the process of droplet formation between water phase fluid(PVA 3%) and organic phase fluid(oil) and vector fields measured by a Dynamic Micro-PIV method in the inside of a droplet while generated. Droplet length controlled by changing flow rate conditions in microchannel. Water-in-oil(W/O) droplets successfully generated at a Y junction and cross microchannel. But oil-in-water(O/W) droplets could not be formed at a Y junction microchannel. That is, PVA 3% flow could not be detached from the PDMS surface and ran parallel with oil flow. When PVA 3% flow rate was constant, droplet length and time period decreased as oil flow rate increased, but droplet frequency increased. When PVA 3% and oil flow rate ratio was constant, droplet length and time period decreased as flow rate increased, but droplet frequency increased. All that case, Standard deviation of droplet formation have less than 5% at averaged droplet length and regular-sized droplets were reproducibly formed.

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Fabrication of SOI FinFET Devices using Arsenic Solid-phase-diffusion

  • Cho, Won-Ju;Koo, Hyun-Mo;Lee, Woo-Hyun;Koo, Sang-Mo;Chung, Hong-Bay
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.5
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    • pp.394-398
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    • 2007
  • A simple doping method to fabricate a very thin channel body of the nano-scaled n-type fin field-effect-transistor (FinFET) by arsenic solid-Phase-diffusion (SPD) process is presented. Using the As-doped spin-on-glass films and the rapid thermal annealing for shallow junction, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. The n-type FinFET devices with a gate length of 20-100 nm were fabricated by As-SPD and revealed superior device scalability.

Experimental Study on the Droplet Formation in a Microchannel with a Cross Junction (십자형 마이크로 채널 내에서의 액적 형성에 관한 실험적 연구)

  • Park, Jae-Hyoun;Bae, Ki-Hwa;Heo, Young-Gun;Suh, Yong-Kweon
    • Journal of the Korean Society of Visualization
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    • v.5 no.2
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    • pp.39-47
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    • 2007
  • This paper describes an experimental study on the droplet formation and the subsequent motion in a microchannel having a cross junction. While one kind of liquid (pure water or water-surfactant mixture) is drawn into a horizontal inlet channel, the other kind (oil) is introduced through two vertical inlet channels. Due to the effect of surface tension on the interface between the two fluids, the droplets of the first fluid are formed near the cross junction. In this study, we have found that the droplet formation is affected even by slight difference in the surface tension. When the surface tension between two fluids is decreased, the droplet size is decreased in order to keep the equilibration between the pressure and the surface tension. In addition, the time interval between each of the droplet formations is decreased and the distance between droplets is also decreased when the surface tension is decreased.

Determination of Memory Trap Distribution in Charge Trap Type SONOSFET NVSM Cells Using Single Junction Charge Pumping Method (Single Junction Charge Pumping 방법을 이용한 전하 트랩형 SONOSFET NVSM 셀의 기억 트랩분포 결정)

  • 양전우;홍순혁;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.10
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    • pp.822-827
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    • 2000
  • The Si-SiO$_2$interface trap and nitride bulk trap distribution of SONOSFET(polysilicon-oxide-nitride-oxide-semiconductor field effect transistor) NVSM (nonvolatile semiconductor memory) cell is investigated by single junction charge pumping method. The device was fabricated by 0.35㎛ standard logic fabrication process including the ONO stack dielectrics. The thickness of ONO dielectricis are 24$\AA$ for tunnel oxide, 74 $\AA$ for nitride and 25 $\AA$ for blocking oxide, respectively. By the use of single junction charge pumping method, the lateral profiles of both interface and memory traps can be calculated directly from experimental charge pumping results without complex numerical simulation. The interface traps were almost uniformly distributed over the whole channel region and its maximum value was 7.97$\times$10$\^$10/㎠. The memory traps were uniformly distributed in the nitride layer and its maximum value was 1.04$\times$10$\^$19/㎤. The degradation characteristics of SONOSFET with write/erase cycling also were investigated.

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Design of an NMOS-Diode eFuse OTP Memory IP for CMOS Image Sensors (CMOS 이미지 센서용 NMOS-Diode eFuse OTP 설계)

  • Lee, Seung-Hoon;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.306-316
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    • 2016
  • In this paper, an NMOS-diode eFuse OTP (One-Time Programmable) memory cell is proposed using a parasitic junction diode formed between a PW (P-Well), a body of an isolated NMOS (N-channel MOSFET) transistor with the small channel width, and an n+ diffusion, a source node, in a DNW (Deep N-Well) instead of an NMOS transistor with the big channel width as a program select device. Blowing of the proposed cell is done through the parasitic junction formed in the NMOS transistor in the program mode. Sensing failures of '0' data are removed because of removed contact voltage drop of a diode since a NMOS transistor is used instead of the junction diode in the read mode. In addition, a problem of being blown for a non-blown eFuse from a read current through the corresponding eFuse OTP cell is solved by limiting the read current to less than $100{\mu}A$ since a voltage is transferred to BL by using an NMOS transistor with the small channel width in the read mode.

Two-Bit/Cell NFGM Devices for High-Density NOR Flash Memory

  • Lee, Jong-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.1
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    • pp.11-20
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    • 2008
  • The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.