• Title/Summary/Keyword: cell error

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The Intelligent Monitoring System for a heavy weight scale (고 중량 측정 장치를 위한 지능형 모니터링 시스템)

  • 김영구;조현찬;정병우;김두용
    • Proceedings of the IEEK Conference
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    • 2000.11c
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    • pp.41-44
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    • 2000
  • In this paper, we propose an Intelligent Monitoring Network System(IMNS) for The truck scale balance system. Truck scale balance system consis of three parts; Load cell part, Indicator part, and Junction box part. IMNS is attached to Junction box in truck scale balance system. Even if Load cell have been some problems, a truck scale balance system still has been run to determine, the values involved error. therefore prosed system is has concentrated on Load cell part. Other Parts have been changed a portion of circuit for monitoring system.

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The Detection of Heat Emission to Solar Cell using UAV-based Thermal Infrared Sensor (UAV 기반 열적외선 센서를 이용한 태양광 셀의 발열 검출)

  • Lee, Geun Sang;Lee, Jong Jo
    • Journal of Korean Society for Geospatial Information Science
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    • v.25 no.1
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    • pp.71-78
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    • 2017
  • Many studies have been implemented to manage solar plant being supplied widely in recent years. This study analyzed heat emission of solar cell using unmanned aerial vehicle(UAV)-based thermal infrared sensor, and major conclusions are as belows. Firstly, orthomosaic image and digital surface model(DSM) data were acquired using UAV-based RGB sensor, and solar light module layer necessary to analyze the heat emission of solar cell was constructed by these data. Also as a result of horizontal error into validation points using virtual reference service(VRS) survey for evaluating the location accuracy of solar light module layer, higher location accuracy could be acquired like standard error of $dx={\pm}2.4cm$ and $dy={\pm}3.2cm$. And this study installed rubber patch to test the heat emission of solar cell and could analyzed efficiently the location of rubber patch being emitted heat using UAV-based thermal infrared sensor. Also standard error showd as ${\pm}3.5%$ in analysis between calculated cell ratio by rubber patch and analyzed cell ratio by UAV-based thermal infrared sensor. Therefore, it could be efficiently analyzed to heat emission of solar cell using UAV-based thermal infrared sensor. Also efficient maintenance of solar plant could be possible through extracting the code of solar light module being emitted of heat automatically.

A Study on New High Density DRAM Cell (고밀도 DRAM Cell의 새로운 구조에 관한 연구)

  • Yi, Cheon-Hee
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.124-130
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    • 1989
  • For the higher density DRAM'S, innovations in fabrication process and circuit design which have led to dramatic density improvement are discussed from the desinger's perspective. A new dynamic RAM cell called Trench Epitaxial Transistor Cell(TETC) using trench technics and SEG have been developed for use in future megabit DRAMS. Storge electrode with $n^+$-polysilicon and $n^+$-source electrode are self-contacted in TETC. With keeping the storage capacitance large enough to prevent soft errors, the cell size reduced to 30% compare with existing BSE cell by utilizing the vertical capacitor made along the isolation region.

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Performance Analysis of Various Coding Schemes for Storage Systems (저장 장치를 위한 다양한 부호화 기법의 성능 분석)

  • Kim, Hyung-June;Kim, Sung-Rae;Shin, Dong-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.12C
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    • pp.1014-1020
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    • 2008
  • Storage devices such as memories are widely used in various electronic products. They require high-density memory and currently the data has been stored in multi-level format, that results in high error rate. In this paper, we apply error correction schemes that are widely used in communication system to the storage devices for satisfying low bit error rate and high code rate. In A WGN channel with average BER $10^{-5}$ and $5{\times}10^{-6}$, we study error correction schemes for 4-1evel cell to achieve target code rate 0.99 and target BER $10^{-11}$ and $10^{-13}$, respectively. Since block codes may perform better than the concatenated codes for high code rate, and it is important to use less degraded inner code even when many bits are punctured. The performance of concatenated codes using general feedforward systematic convolutional codes are worse than the block code only scheme. The simulation results show that RSC codes must be used as inner codes to achieve good performance of punctured convolutional codes for high code rate.

The road less traveled: strategies to enhance the frequency of homology-directed repair (HDR) for increased efficiency of CRISPR/Cas-mediated transgenesis

  • Devkota, Sushil
    • BMB Reports
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    • v.51 no.9
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    • pp.437-443
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    • 2018
  • Non-homologous end joining (NHEJ), and to a lesser extent, the error-free pathway known as homology-directed repair (HDR) are cellular mechanisms for recovery from double-strand DNA breaks (DSB) induced by RNA-guided programmable nuclease CRISPR/Cas. Since NHEJ is equivalent to using a duck tape to stick two pieces of metals together, the outcome of this repair mechanism is prone to error. Any out-of-frame mutations or premature stop codons resulting from NHEJ repair mechanism are extremely handy for loss-of-function studies. Substitution of a mutation on the genome with the correct exogenous repair DNA requires coordination via an error-free HDR, for targeted transgenesis. However, several practical limitations exist in harnessing the potential of HDR to replace a faulty mutation for therapeutic purposes in all cell types and more so in somatic cells. In germ cells after the DSB, copying occurs from the homologous chromosome, which increases the chances of incorporation of exogenous DNA with some degree of homology into the genome compared with somatic cells where copying from the identical sister chromatid is always preferred. This review summarizes several strategies that have been implemented to increase the frequency of HDR with a focus on somatic cells. It also highlights the limitations of this technology in gene therapy and suggests specific solutions to circumvent those barriers.

Design of R=1/2, K=7 Type High Speed Viterbi Decoder with Circularly Connected 2-D Analog Parallel Processing Cell Array (아날로그 2차원 셀의 순환형 배열을 이용한 R=l/2. K=7형 고속 비터비 디코더 설계)

  • 손홍락;김형석
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.52 no.11
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    • pp.650-656
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    • 2003
  • A high speed Viterbi decoder with a circularly connected 2-dimensional analog processing ceil array Is proposed. The proposed Viterbi .decoder has a 2-dimensional parallel processing structure in which an analog processing cell is placed at each node of a trellis diagram, the output column of the analog processing cells is connected to the decoding column, and thus, the output(last) column becomes a column right before the decoding(first) column. The reference input signal given at a decoding column is propagated to the whole network while Its magnitude is reduced by the amount of a error metric on each branch. The circuit-based decoding is done by adding a trigger signals of same magnitudes to disconnect the path corresponding to logic 0 (or 1) and by observing its effect at an output column (the former column of the decoding column). The proposed Viterbi decoder has advantages in that it is operated with better performance of error correction, has a shorter latency and requires no path memories. The performance of error correction with the proposed Viterbi decoder is tested via the software simulation.

VLSI Implementation of Forward Error Control Technique for ATM Networks

  • Padmavathi, G.;Amutha, R.;Srivatsa, S.K.
    • ETRI Journal
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    • v.27 no.6
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    • pp.691-696
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    • 2005
  • In asynchronous transfer mode (ATM) networks, fixed length cells of 53 bytes are transmitted. A cell may be discarded during transmission due to buffer overflow or a detection of errors. Cell discarding seriously degrades transmission quality. The quality degradation can be reduced by employing efficient forward error control (FEC) to recover discarded cells. In this paper, we present the design and implementation of decoding equipment for FEC in ATM networks based on a single parity check (SPC) product code using very-large-scale integration (VLSI) technology. FEC allows the destination to reconstruct missing data cells by using redundant parity cells that the source adds to each block of data cells. The functionality of the design has been tested using the Model Sim 5.7cXE Simulation Package. The design has been implemented for a $5{\times}5$ matrix of data cells in a Virtex-E XCV 3200E FG1156 device. The simulation and synthesis results show that the decoding function can be completed in 81 clock cycles with an optimum clock of 56.8 MHz. A test bench was written to study the performance of the decoder, and the results are presented.

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A Selection of Threshold for the Generalized Hough Transform: A Probabilistic Approach (일반화된 허프변환의 임계값 선택을 위한 확률적 접근방식)

  • Chang, Ji Y.
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.1
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    • pp.161-171
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    • 2014
  • When the Hough transform is applied to identify an instance of a given model, the output is typically a histogram of votes cast by a set of image features into a parameter space. The next step is to threshold the histogram of counts to hypothesize a given match. The question is "What is a reasonable choice of the threshold?" In a standard implementation of the Hough transform, the threshold is selected heuristically, e.g., some fraction of the highest cell count. Setting the threshold too low can give rise to a false alarm of a given shape(Type I error). On the other hand, setting the threshold too high can result in mis-detection of a given shape(Type II error). In this paper, we derive two conditional probability functions of cell counts in the accumulator array of the generalized Hough transform(GHough), that can be used to select a scientific threshold at the peak detection stage of the Ghough.

Development and Evaluation of SWAT Topographic Feature Extraction Error(STOPFEE) Fix Module from Low Resolution DEM (저해상도 DEM 사용으로 인한 SWAT 지형 인자 추출 오류 개선 모듈 개발 및 평가)

  • Kim, Jong-gun;Park, Youn-shik;Kim, Nam-won;Chung, Il-moon;Jang, Won-seok;Park, Jun-ho;Moon, Jong-pil;Lim, Kyoung Jae
    • Journal of Korean Society on Water Environment
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    • v.24 no.4
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    • pp.488-498
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    • 2008
  • Soil and Water Assessment Tool (SWAT) model have been widely used in simulating hydrology and water quality analysis at watershed scale. The SWAT model extracts topographic feature using the Digital Elevation Model (DEM) for hydrology and pollutant generation and transportation within watershed. Use of various DEM cell size in the SWAT leads to different results in extracting topographic feature for each subwatershed. So, it is recommended that model users use very detailed spatial resolution DEM for accurate hydrology analysis and water quality simulation. However, use of high resolution DEM is sometimes difficult to obtain and not efficient because of computer processing capacity and model execution time. Thus, the SWAT Topographic Feature Extraction Error (STOPFEE) Fix module, which can extract topographic feature of high resolution DEM from low resolution and updates SWAT topographic feature automatically, was developed and evaluated in this study. The analysis of average slope vs. DEM cell size revealed that average slope of watershed increases with decrease in DEM cell size, finer resolution of DEM. This falsification of topographic feature with low resolution DEM affects soil erosion and sediment behaviors in the watershed. The annual average sediment for Soyanggang-dam watershed with DEM cell size of 20 m was compared with DEM cell size of 100 m. There was 83.8% difference in simulated sediment without STOPFEE module and 4.4% difference with STOPFEE module applied although the same model input data were used in SWAT run. For Imha-dam watershed, there was 43.4% differences without STOPFEE module and 0.3% difference with STOPFEE module. Thus, the STOPFEE topographic database for Soyanggang-dam watershed was applied for Chungju-dam watershed because its topographic features are similar to Soyanggang-dam watershed. Without the STOPFEE module, there was 98.7% difference in simulated sediment for Chungju-dam watershed for DEM cell size of both 20 m and 100 m. However there was 20.7% difference in simulated sediment with STOPFEE topographic database for Soyanggang-dam watershed. The application results of STOPFEE for three watersheds showed that the STOPFEE module developed in this study is an effective tool to extract topographic feature of high resolution DEM from low resolution DEM. With the STOPFEE module, low-capacity computer can be also used for accurate hydrology and sediment modeling for bigger size watershed with the SWAT. It is deemed that the STOPFEE module database needs to be extended for various watersheds in Korea for wide application and accurate SWAT runs with lower resolution DEM.

The methods of error detection at Digital circuit using the FPGA 2-dimensional array (FPGA 2 차원 배열을 사용한 디지털 회로에서 오류 검출의 방법)

  • Kim, Soke-Hwan;Hur, Chang-Wu
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.05a
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    • pp.202-206
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    • 2012
  • In this paper, we proposed on the direction of self-repairing mimicking the cell on the digital system design. Three-dimensional array of cells rather than using the original structure of FPGA, an array of blocks for efficient error detection methods were investigated. With a certain regularity, so the design method in detail by dividing the full array. The digital circuits can be detected fault location easily and quickly.

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