1 |
B. Polianskikh and Z. Zilic, "Induced Error-Correcting Code for 2bit-per-cell Multi-Level DRAM," Circuits and Systems,.MWSCAS 2001, pp.352-355.
|
2 |
J. P. Odenwalder, Error Control Coding Handbook, Linkabit Corporation, San Diego, Calif., July 15, 1976.
|
3 |
M. Kim, "On Systematic Punctured Convolutional Codes," IEEE Trans. On Commun., Vol.45, No.2, pp.133-139, Feb. 1997.
DOI
ScienceOn
|
4 |
T. K. Moon, Error Correction Coding, Wiley, 2005.
|
5 |
S. Lin, and D. J. Costello, Error Control Coding, 2nd ed. Prentice Hall, Upper Saddle River, N.J., 2004.
|
6 |
G. D. Forney, Jr., Concatenated Codes, MIT Press, Cambridge, 1966.
|
7 |
김형준, 김성래, 신동준, "저장 장치를 위한 연접 부호화 기법의 성능 분석", 제18회 통신 정보 합동학술대회(JCCI'08), 2008년 4월.
|
8 |
T. Tanzawa, T. Tanaka, K Takeuchi, R Shirota, S.Aritome, H. Watanabe, G. Hemink, K. Shimizu, S. Sato,Y. Takeuchi, and K. Ohuchi, "A Compact On-Chip ECC for Low Cost Flash Memories," IEEE Journal of Solid State Circuit, Vol.32, No.5, pp.662-669, May 1997.
DOI
ScienceOn
|
9 |
M. Tuchler, and A. Dholakia, "Rate-(N− 1)/N Convolutional Codes with Optimal Spectrum," IBM Research Report RZ 3409 (# 93559) 06/28/02.
|
10 |
C. Berrou, A. Glavieux, and P. Thitimajshima, "Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes," IEEE ICC'93, pp.1064-1070, May 1993.
|