• Journal of the Korean Operations Research and Management Science Society
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• v.22 no.2
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• pp.99-123
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• 1997

Performance analysis of NTT/BT protocol is investigated, which is a GFC (Generic Flow Control) ptotocol in ATM (Asynchronous Transfer Mode ) network and is based on cyclic reset mechanism. THe mean cell delay time is proposed as a performance measure of NTT/BT protocol. The mean cell delay time is defined as the duration from the instant the cell arrives at the transmission buffer until the cell is fully transmitted. The process of cell transmission can be described as a single server queueing modle with two dependent services. By utilizing this model, mean cell delay time is obtained and sensitivity of the factors such as window size and reset period is also analysed.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.70-73
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• 1998

This paper present a new priority control mechanism which is to balance the cell loss rate by measuring, in real time, the number of discarded cells in the queuing system with a different loss priority for each class of service such that each class of service meets its cell loss rate requirements. And, to reduce the delay rates we modified existing cell scheduling scheme. Throughout the computer simulation, the existing methods and proposed scheme is compared with respect to cell loss rate and average delay time. In the result of simulation, the proposed scheme have more improved performance than the other schemes with respect to cell loss rate and average delay time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.5
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• pp.842-856
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• 1994

The various services that a broadband integrated services digital network (B-ISDN) carries, have a wide range of delay, delay jitter and cell loss probability requirements. Design of appropriate control schemes for B-ISDN is an extremely important and challenging problem. In this paper, we proposed multiplexing algorithm with both delay and loss priorities in order to satisfy the diverse requirements. For the implementation of cell lose priority, we assumed that voice cells are generated as non-discardable(i.e., high priority) and discardable (i.e., low priotity)cells. The low priority voice cell may be discarded inside the network if congestion occurs. The cell dropping scheme is shown to reduce cell losses as well as delays for both voice and data. Such a load shedding scheme is expected to improve significantly utilization of B-ISDN.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3184-3186
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• 1999

In this paper, a new structure of fully differential delay cell VCO using quadrature phase for low phase noise and high speed operation is suggested. It is realized by inserting voltage clamp circuit into input pairs of delay cells that include three-control current source having high output impedance. In this reason. this newly designed delay cell for VCO has the low power supply sensitivity so that the phase noise can be reduced. The whole characteristics of VCO were simulated by using HSPICE and SABER. Simulation results show that the phase noise of new VCO is quite small compared with conventional fully differential delay cell VCO and ring oscillator type VCO. It is also very beneficial to low power supply design because of wide tuning range.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.454-464
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• 2002

In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.

• The Journal of the Korea Contents Association
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• v.6 no.3
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• pp.1-11
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• 2006

With the improvement of information telecommunication technology, the various service in broadband integrated services digital networks have a wide range of delay, delay jitter and cell loss probability requirements according to traffic specification. Therefore, the design of appropriate control schemes that can satisfy the cell loss, delay requirements with various traffic specification for B-ISDN is an extremely important challenging problem. In this paper, we propose a priority control scheme using a window counter and a cell counter per each type of class. In the proposed priority control scheme, for satisfying required service quality, we performed the priority control scheme using the delay/loss factors obtained by comparing window counter with cell counter. The performance of proposed control scheme is estimated by computer simulation. In the results of simulation, we verified that the proposed method satisfied per class requirements as the results showed that cell loss probability has a order of video, data, voice and delay time has a order of video, voice and data.

• The Transactions of the Korea Information Processing Society
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• v.2 no.5
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• pp.667-676
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• 1995

In ATM traffic multiplexing, the cell clumping and the cell dispersion are occured due to the cell delay variance(CDV) which changes the traffic characteristics. These cell variances increase the burstiness of t.he cell streams and make the network congested. The function of the traffic shaping is necessary to transmit the input streams into the networks or into the traffic policing schemes with some intevals. Most of the existing studies regard the input traffics as the traffic with the identical characteristics. In this study, the traffic shaping is processed by considering the traffic characteristICS with t.he loss-sensitive traffic and the delay-sensitive traffic. The traffic shaping model and the traffic shaping algorithm which considers the" characteristics of input streams have been presented. The traffic effect On t.he CDV size is also studied. The proposed scheme is compared to Virtual Scheduling Algorithm(VSA) and the efficiency of the proposed scheme is evaluated. According to the simulation results, t.he mean delay is decreased about 12% in delay-sensitive traffic and the traffic burstiness is decreased about 11 % in loss-sensitive traffic.

• Journal of Korea Multimedia Society
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• v.14 no.5
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• pp.614-621
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• 2011

This paper presents design of a wide tuning range digitally controlled oscillator(DCO) for Mobile-DTV applications. DCO is the key element of the ADPLL block that generates oscillation frequencies. We proposed a binary delay chain(BDC) structure, for wide tuning range DCO, modifying conventional fixed delay chain. The proposed structure generates oscillation frequencies by delay cell combination which has a variable delay time of $2^i$ in the range of $0{\leq}i{\leq}n-1$. The BOC structure can reduce the number of delay cells because it make possible to select delay cell and resolution. We simulated the proposed DCO by Cadence's Spectre RF tool in 1.8V chartered $0.18{\mu}m$ CMOS process. The simulation results showed 77MHz~2.07GHz frequency range and 3ps resolution. The phase noise yields -101dBc/Hz@1MHz at Mobile-DTV maximum frequency 1675MHz and the power consumption is 5.87mW. The proposed DCO satisfies Mobile-DTV standards such as ATSC-M/H, DVB-H, ISDB-T, T-DMB.

• Proceedings of the Korea Contents Association Conference
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• 2006.05a
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• pp.405-408
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• 2006

Design of appropriate control schemes that can satisfy the cell loss, delay requirements with various traffic specification for B-ISDN is an extremely important challenging problem. In this paper, we proposes a priority control scheme with a window counter and a cell counter per each type of class. The priority control for satisfying required service quality is performed with delay/loss factor obtained by comparing window counter with cell counter. The performance of proposed control scheme is estimated by computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.72-78
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• 2009

This paper proposes a low phase noise ring voltage controlled oscillator(VCO) with a standard $0.13{\mu}m$ CMOS process for PLL circuit using the VCO-gain-controlled Delay cell. The proposed Delay cell architecture with a active resistor using a MOS transistor. This method can reduced a VCO gain so that improve phase noise. And, Delay cell consist of Wide-Swing Cascode current mirror, Positive Latch and Symmetric load for low phase noise. The measurement results demonstrate that the phase noise is -119dBc/Hz at 1MHz offset from 1.9GHz. The VCO gain and power dissipation are 440MHz/V and 9mW, respectively.