• Title/Summary/Keyword: carrier suppressor

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Influence of carrier suppressors on electrical properties of solution-derived InZnO-based thin-film transistors

  • Sim, Jae-Jun;Park, Sang-Hui;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.262-262
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    • 2016
  • 최근 고해상도 디스플레이가 주목받으면서 기존 비정질 실리콘(a-Si)을 대체할 수 있는 재료에 관한 연구가 활발히 진행되고 있다. a-Si의 경우 간단한 공정 과정, 적은 생산비용, 대면적화가 가능하다는 장점이 있지만 전자 이동도가 매우 낮은 단점이 있다. 반면, 산화물 반도체는 비정질 상태에서 전자 이동도가 높으며 큰 밴드갭을 가지고 있어 투명한 특성을 나타낼 뿐만 아니라, 저온공정이 가능하여 기판의 제한이 없는 장점을 가지고 있다. 대표적으로 가장 널리 연구되고 있는 산화물 반도체는 a-IGZO(amorphous indium-gallium-zinc oxide)이다. 그러나 InZnO(IZO) 기반의 산화물 반도체에서 carrier suppressor 역할을 하는 Ga(gallium)은 수요에 대한 공급이 원활하지 못하여 비싸다는 단점이 있다. 그러므로 경제적이면서 a-IGZO와 유사한 전기적 특성을 나타낼 수 있는 suppressor 물질이 필요하다. 따라서 본 연구에서는 IZO 기반의 산화물 반도체에서 Ga을 Hf(hafnium), Zr(zirconium), Si(silicon)으로 대체하여 용액증착(solution-deposition) 공정으로 각각의 채널층을 형성한 back-gate type의 박막 트랜지스터(thin-film transistor, TFT) 소자를 제작하였다. 용액증착 공정은 물질의 비율을 자유롭게 조절할 수 있고, 대기압의 조건에서도 공정이 가능하기 때문에 짧은 공정시간과 저비용의 장점이 있다. 제작된 소자는 p-type Si 위에 게이트 절연막으로 100 nm의 열산화막이 성장된 기판을 사용하였다. 표준 RCA 클리닝 후에 각 solution 물질을 spin coating 방식으로 증착하였다. 이후, photolithography, develop, wet etching의 과정을 거쳐 채널층 패턴을 형성하였다. 또한, 산화물 반도체의 전기적 특성을 향상시키기 위해서 후속 열처리 과정(post deposition annealing, PDA)은 필수적이다. CTA 방식은 높은 열처리 온도와 긴 열처리 시간의 단점이 있다. 따라서, 본 연구에서는 $100^{\circ}C$ 이하의 낮은 온도와 짧은 열처리 시간의 장점을 가지는 MWI (microwave irradiation)를 후속 열처리로 진행하였다. 그 결과, 각 물질로 구현된 소자들은 기존 a-IGZO와 비교하여 적은 양의 carrier suppressor로도 우수한 전기적 특성 및 안정성을 얻을 수 있었다. 따라서, Si, Hf, Zr 기반의 산화물 반도체는 기존의 Ga을 대체하여 저비용으로 디스플레이를 구현할 수 있는 IZO 기반 재료로 기대된다.

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Solution-processed indium-zinc oxide with carrier-suppressing additives

  • Kim, Dong Lim;Jeong, Woong Hee;Kim, Gun Hee;Kim, Hyun Jae
    • Journal of Information Display
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    • v.13 no.3
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    • pp.113-118
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    • 2012
  • Metal oxide semiconductors were considered promising materials as backplanes of future displays. Moreover, the adoption of carrier-suppressing metal into indium-zinc oxide (IZO) has become one of the most important themes in the metal oxide research field. In this paper, efforts to realize and optimize IZO with diverse types of carrier suppressors are summarized. Properties such as the band gap of metal in the oxidized form and its electronegativity were examined to confirm their relationship with the metal's carrier-suppressing ability. It was concluded that those two properties could be used as indicators of the carrier-suppressing ability of a material. As predicted by the properties, the alkali earth metals and early transition metals used in the research effectively suppressed the carrier and optimized the electrical properties of the metal oxide semiconductors. With the carrier-suppressing metals, IZO-based thin-film transistors with high (above $1cm^2/V{\cdot}s$) mobility, a lower than 0.6V/dec sub-threshold gate swing, and an over $3{\times}10^6$ on-to-off current ratio could be achieved.

A Study on the Cobalt Electrodeposition of High Aspect Ratio Through-Silicon-Via (TSV) with Single Additive (단일 첨가제를 이용한 고종횡비 TSV의 코발트 전해증착에 관한 연구)

  • Kim, Yu-Jeong;Lee, Jin-Hyeon;Park, Gi-Mun;Yu, Bong-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • 2018.06a
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    • pp.140-140
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    • 2018
  • The 3D interconnect technologies have been appeared, as the density of Integrated Circuit (IC) devices increases. Through Silicon Via (TSV) process is an important technology in the 3D interconnect technologies. And the process is used to form a vertically electrical connection through silicon dies. This TSV process has some advantages that short length of interconnection, high interconnection density, low electrical resistance, and low power consumption. Because of these advantages, TSVs could improve the device performance higher. The fabrication process of TSV has several steps such as TSV etching, insulator deposition, seed layer deposition, metallization, planarization, and assembly. Among them, TSV metallization (i.e. TSV filling) was core process in the fabrication process of TSV because TSV metallization determines the performance and reliability of the TSV interconnect. TSVs were commonly filled with metals by using the simple electrochemical deposition method. However, since the aspect ratio of TSVs was become a higher, it was easy to occur voids and copper filling of TSVs became more difficult. Using some additives like an accelerator, suppressor and leveler for the void-free filling of TSVs, deposition rate of bottom could be fast whereas deposition of side walls could be inhibited. The suppressor was adsorbed surface of via easily because of its higher molecular weight than the accelerator. However, for high aspect ratio TSV fillers, the growth of the top of via can be accelerated because the suppressor is replaced by an accelerator. The substitution of the accelerator and the suppressor caused the side wall growth and defect generation. The suppressor was used as Single additive electrodeposition of TSV to overcome the constraints. At the electrochemical deposition of high aspect ratio of TSVs, the suppressor as single additive could effectively suppress the growth of the top surface and the void-free bottom-up filling became possible. Generally, copper was used to fill TSVs since its low resistivity could reduce the RC delay of the interconnection. However, because of the large Coefficients of Thermal Expansion (CTE) mismatch between silicon and copper, stress was induced to the silicon around the TSVs at the annealing process. The Keep Out Zone (KOZ), the stressed area in the silicon, could affect carrier mobility and could cause degradation of the device performance. Cobalt can be used as an alternative material because the CTE of cobalt was lower than that of copper. Therefore, using cobalt could reduce KOZ and improve device performance. In this study, high-aspect ratio TSVs were filled with cobalt using the electrochemical deposition. And the filling performance was enhanced by using the suppressor as single additive. Electrochemical analysis explains the effect of suppressor in the cobalt filling bath and the effect of filling behavior at condition such as current type was investigated.

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Role of Hf in amorphous oxide thin film transistors fabricated by rf-magnetron sputtering (스퍼터링 공정으로 제작된 비정질 산화물 박막트랜지스터의 하프늄 금속이온 영향)

  • Chong, Eu-Gene;Chun, Yoon-Soo;Jo, Kyoung-Chol;Kim, Seung-Han;Jung, Da-Woon;Lee, Sang-Yeol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.12-12
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    • 2010
  • Time dependence of the shift of the threshold voltage of amorphous hafnium-indium-zinc oxide (a-HIZO) has been reported under on-current stress condition. a-HIZO thin films were deposited on $SiO_2$/Si (100) by rf magnetron sputtering. XPS measurement indicates that the Hf metal cations in a-HIZO system after annealing process reduce oxygen vacancies by binding oxygen. It was found that the Hf metal cation can be effectively incorporated in the IZO thin films as a suppressor against both the oxygen deficiencies and the carrier generation in the ZnO-based system.

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The Candidate Tumor Suppressor Gene SLC8A2 Inhibits Invasion, Angiogenesis and Growth of Glioblastoma

  • Qu, Mingqi;Yu, Ju;Liu, Hongyuan;Ren, Ying;Ma, Chunxiao;Bu, Xingyao;Lan, Qing
    • Molecules and Cells
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    • v.40 no.10
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    • pp.761-772
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    • 2017
  • Glioblastoma is the most frequent and most aggressive brain tumor in adults. Solute carrier family 8 member 2 (SLC8A2) is only expressed in normal brain, but not present in other human normal tissues or in gliomas. Therefore, we hypothesized that SLC8A2 might be a glioma tumor suppressor gene and detected the role of SLC8A2 in glioblastoma and explored the underlying molecular mechanism. The glioblastoma U87MG cells stably transfected with the lentivirus plasmid containg SLC8A2 (U87MG-SLC8A2) and negative control (U87MG-NC) were constructed. In the present study, we found that the tumorigenicity of U87MG in nude mice was totally inhibited by SLC8A2. Overexpression of SLC8A2 had no effect on cell proliferation or cell cycle, but impaired the invasion and migration of U87MG cells, most likely through inactivating the extracellular signal-related kinases (ERK)1/2 signaling pathway, inhibiting the nuclear translocation and DNA binding activity of nuclear factor kappa B ($NF-{\kappa}B$), reducing the level of matrix metalloproteinases (MMPs) and urokinase-type plasminogen activator (uPA)-its receptor (uPAR) system (ERK1/2-$NF-{\kappa}B$-MMPs/uPA-uPAR), and altering the protein levels of epithelial to mesenchymal transitions (EMT)-associated proteins E-cardherin, vimentin and Snail. In addition, SLC8A2 inhibited the angiogenesis of U87MG cells, probably through combined inhibition of endothelium-dependent and endothelium-nondependent angiogenesis (vascular mimicry pattern). Totally, SLC8A2 serves as a tumor suppressor gene and inhibits invasion, angiogenesis and growth of glioblastoma.

Fabrication and Charaterization of Oxide Thin Film Transistor (산화물반도체 박막트랜지스터 제작 및 전기적 특성 분석)

  • Lee, Sang Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.4
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    • pp.275-277
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    • 2013
  • Thin-film transistors(TFTs) with silicon zinc tin oxide(SZTO) channel layer are fabricated by solution-process. The threshold voltage ($V_{th}$) shifted toward positive directly with increasing Si contents in SZTO system. Because the Si has a lower standard electrode potential (SEP) than Sn, Zn, thus degenerate the oxygen vacancy (VO). As a result, the Si act as carrier suppressor and oxygen binder in the SZTO as well as a $V_{th}$ controller.

Investigation on the Stability Enhancement of Oxide Thin Film Transistor (산화물반도체 트랜지스터 안정성 향상 연구)

  • Lee, Sang Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.5
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    • pp.351-354
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    • 2013
  • Thin-film transistors(TFTs) with silicon-zinc-tin-oxide(SiZnSnO, SZTO) channel layer are fabricated by rf sputtering method. Electrical properties were changed by different annealing treatment of dry annealing and wet annealing. This procedure improves electrical property especially, stability of oxide TFT. Improved electrical properties are ascribed to desorption of the negatively charged oxygen species from the surfaces by annealing treatment. The threshold voltage ($V_{th}$) shifted toward positive as increasing Si contents in SZTO system. Because the Si has a lower standard electrode potential (SEP) than that that of Sn, Zn, resulting in the degeneration of the oxygen vacancy ($V_O$). As a result, the Si acts as carrier suppressor and oxygen binder in the SZTO as well as a $V_{th}$ controller, resulting in the enhancement of stability of TFTs.

Electrical Properties of Mg Doped ZnSnO TFTs Fabricated by Solution-process (용액공정을 이용한 ZnSnO 산화물 반도체 박막 트랜지스터에서 Mg 첨가에 따른 영향)

  • Choi, Jun-Young;Park, Ki-Ho;Kim, Sang-Sig;Lee, Sang-Yeol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.9
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    • pp.697-700
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    • 2011
  • Thin-film transistors(TFTs) with magnesium zinc tin oxide(MZTO) channel layer are fabricated by solution-process. The threshold voltage (Vth) shifted toward positive directly with increasing Mg contents in MZTO system. Because the Mg has a lower standard electrode potential (SEP) than Sn, Zn, thus degenerate the oxygen vacancy ($V_O$). As a result, the Mg act as carrier suppressor and oxygen binder in the MZTO as well as a Vth controller.

Study of microwave anneal on solution-processed InZnO-based thin-film transistors with Ga, Hf and Zr carrier suppressors

  • Hong, Jeong-Yun;Lee, Sin-Hye;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.263-263
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    • 2016
  • 최근 반도체 시장에서는 저비용으로 고성능 박막 트랜지스터(TFT)를 제작하기 위한 다양한 기술들이 연구되고 있다. 먼저, 재료적인 측면에서는 비정질 상태에서도 높은 이동도와 가시광선 영역에서 투명한 특성을 가지는 산화물 반도체가 기존의 비정질 실리콘이나 저온 폴리실리콘을 대체하여 차세대 디스플레이의 구동소자용 재료로 많은 주목받고 있다. 또한, 공정적인 측면에서는 기존의 진공장비를 이용하는 PVD나 CVD가 아닌 대기압 상태에서 이루어지는 용액 공정이 저비용 및 대면적화에 유리하고 프리커서의 제조와 박막의 증착이 간단하다는 장점을 가지기 때문에 활발한 연구가 이루어지고 있다. 특히 산화물 반도체 중에서도 indium-gallium-zinc oxide (IGZO)는 비교적 뛰어난 이동도와 안정성을 나타내기 때문에 많은 연구가 진행되고 있지만, 산화물 반도체 기반의 박막 트랜지스터가 가지는 문제점 중의 하나인 문턱전압의 불안정성으로 인하여 상용화에 어려움을 겪고 있다. 따라서, 본 연구에서는 기존의 산화물 반도체의 불안정한 문턱전압의 문제점을 해결하기 위해 마이크로웨이브 열처리를 적용하였다. 또한, 기존의 IGZO에서 suppressor 역할을 하는 값비싼 갈륨(Ga) 대신, 저렴한 지르코늄(Zr)과 하프늄(Hf)을 각각 적용시켜 용액 공정 기반의 Zr-In-Zn-O (ZIZO) 및 Hf-In-Zn-O (HIZO) TFT를 제작하여 시간에 따른 문턱 전압의 변화를 비교 및 분석하였다. TFT 소자는 p-Si 위에 습식산화를 통하여 100 nm 두께의 $SiO_2$가 열적으로 성장된 기판 위에 제작되었다. 표준 RCA 세정을 진행하여 표면의 오염 및 자연 산화막을 제거한 후, Ga, Zr, Hf 각각 suppressor로 사용한 IGZO, ZIZO, HIZO 프리커서를 이용하여 박막을 형성시켰다. 그 후 소스/드레인 전극 형성을 위해 e-beam evaporator를 이용하여 Ti/Al을 5/120 nm의 두께로 증착하였다. 마지막으로, 후속 열처리로써 마이크로웨이브와 퍼니스 열처리를 진행하였다. 그 결과, 기존의 퍼니스 열처리와 비교하여 마이크로웨이브 열처리된 IGZO, ZIZO 및 HIZO 박막 트랜지스터는 모두 뛰어난 안정성을 나타냄을 확인하였다. 결론적으로, 본 연구에서 제안된 마이크로웨이브 열처리된 용액공정 기반의 ZIZO와 HIZO 박막 트랜지스터는 추후 디스플레이 산업에서 IGZO 박막 트랜지스터를 대체할 수 있는 저비용 고성능 트랜지스터로 적용될 것으로 기대된다.

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Improved Stability Sputtered IZO Thin Film Transistor Using Solution Processed Al2O3 Diffusion Layer (Solution-Processed Al2O3 확산층을 이용한 Sputtering IZO Thin Film Transistor의 안정성 향상)

  • Hwang, Namgyung;Lim, Yooseong;Lee, Jeong Seok;Lee, Sehyeong;Yi, Moonsuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.5
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    • pp.273-277
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    • 2018
  • This research introduces the sputtered IZO thin film transistor (TFT) with solution-processed $Al_2O_3$ diffusion layer. IZO is one of the most commonly used amorphous oxide semiconductor (AOS) TFT. However, most AOS TFTs have many defects that degrade performance. Especially oxygen vacancy in the active layer. In previous research, aluminum was used as a carrier suppressor by binding the oxygen vacancy and making a strong bond with oxygen atoms. In this paper, we use a solution-processed $Al_2O_3$ diffusion layer to fabricate stable IZO TFTs. A double-layer solution-processed $Al_2O_3$-sputtered IZO TFT showed better performance and stability, compared to normal sputtered IZO TFT.