• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.2
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• pp.182-187
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• 1988

Hot carrier induced device degradation characteristics under DC bias stress have been investigated in n-MOSFETs with channel length of 1.2,1.8 um, and compared with those of LDD structure device with same channel length. Based on these results, the device lifetime in normal operating bias(Vgs=Vds=5V) is evaluated. The lifetimes of conventional and LDD n-MOSFET with channel length of 1.2 um are estimated about for 17 days and for 12 years, respectively. The degradation rate of LDD n-MOSFET under the same stress is the lowest at n-region implnatation dose of 2.5E15 cm-\ulcorner while the substrate current is the lowest at the dose of 1E13cm-\ulcorner Thses results show that the device degradation characteristics are basic measurement parameter to find optimum process conditions in LDD devices and evaluate a reliability of sub-micron device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.1
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• pp.1-6
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• 2002

The hot carried degradation in a metal oxide semiconductor device has been one of the most serious concerns for MOS-ULSI. In this paper, three types of LDD(lightly doped drain) structure for suppression of hot carried degradation, such as decreasing of performance due to spacer-induced degradation and increase of series resistance will be investigated. in this study, LDD-nMOSFETs used had three different drain structure, (1) conventional surface type LDD(SL), (2) Buried type LDD(BL), (3) Surface implantation type LDD(SI). As experimental results, the surface implantation the LDD structure showed that improved hot carrier lifetime to comparison with conventional surface and buried type LDD structures.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.405-408
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• 2004

In this work, Analytical model for voltage and current characteristics of NPT(Non-PunchThrough) IGBT(Insulated Gate Bipolar Transistor) was represented. voltage and current characteristics models were based on prediction on power loss of NPT IGBT during transient condition. For Analytical current model, excess carrier concentration and accumulated charge in active base width was analyzed with time variance. Analytical models were simulated by varying lifetime of excess minority carrier.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.9-14
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• 2006

The dependence of NBTI lifetime on the BEOL processes such as sintering gas type and passivation layer has been characterized in depth. Then, optimized BEOL process scheme is proposed to improve NBTI lifetime. NBTI showed degradation due to the plasma enhanced nitride (PE-SiN) passivation film and $H_2$ sintering anneal. Then, new process scheme of $N_2$ annealing instead of $H_2$ annealing prior to PE-SiN deposition is proposed. The proposed BEOL process flow showed that NBTI lifetime can be improved a lot without degradation of device performance and NMOS hot carrier reliability.

• 한국신재생에너지학회:학술대회논문집
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• 2006.06a
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• pp.214-217
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• 2006

p-type 비정질 실리콘 에미터와 n-type 실리콘 기판의 계면에 intrinsic 비정질 실리콘을 증착함으로써 계면의 재결합을 억제하여 20%가 넘는 효율을 보이는 이종접합 태양전지가 Sanyo에 의해 처음 제시된 후 intrinsic layer에 대한 연구가 많이 진행되어 왔다. 하지만 p-type wafer의 경우는 n-type에 비해 intrinsic buffer의 효과가 미미하거나 오히려 특성을 저하시킨다는 보고가 있으며 그 이유로는 minority carrier에 대한 barrier가 상대적으로 낮다는 것과 partial epitaxy가 발생하기 때문으로 알려져 있다. 본 연구에서는 partial epitaxy를 억제하기 위한 방법으로 증착 온도를 낮추고 QSSPC를 사용하여 minority carrier lifetime을 측정함으로써 각 온도에 따른 passivation 특성을 평가하였다. 또한 SiH4에 H2를 섞어서 증착하였을 경우 각 dilution ratio(H2 flow/SiH4 flow)에서의 passivation 특성 또한 평가하였다. 기판 온도 $100^{\circ}C$에서 증착된 샘플의 lifetime이 가장 길었으며 그 이하와 이상에서는 lifetime이 감소하는 경향을 보였다 낮은 온도에서는 박막 자체의 결함이 증가하였기 때문이며 높은 온도에서는 partial epitaxy의 영향으로 추정된다. H2 dilution을 하여 증착한 샘플의 경우 SiH4만 가지고 증착한 샘플보다 훨씬 높은 lifetime을 가졌다 이 또한 박막 FT-IR결과로부터 H2 dilution을 한 경우 compact한 박막이 형성되는 것을 확인할 수 있었는데 radical mobility 증가에 의한 박막 특성 향상이 원인으로 생각된다.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1418-1420
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• 2008

In this paper, the light emitting efficiency, spectrum, and the lifetime of the phosphorescent devices, whose emission characteristics are strongly dominated not only by the energy transfer but also by the charge carrier trapping induced by the emissive dopant, are explained by differences in the energy levels of the host, dopant, and nearby transport layers. On the basis of our finding on device performance and photocurrent measurement data by time-of-flight (TOF), we investigated the effect of the difference of carrier trapping dopant and properties of the host materials on the efficiency roll-off of phosphorescent organic light emitting diode (OLED), along with a physical interpretation and practical design scheme, such as a multiple host system, for improving the efficiency and lifetime of devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.139.2-139.2
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• 2016

Electrons and phonons in chalcogenide-based materials play are important factors in the performance of an optical data storage media and thermoelectric devices. However, the fundamental kinetics of carriers in chalcogenide materials remains controversial, and active debate continues over the mechanism responsible for carrier relaxation. In this study, we investigated ultrafast carrier dynamics in an multilayered $\{Sb(3{\AA})/Te(9{\AA})\}n$ thin film during the transition from the amorphous to the crystalline phase using optical pump terahertz probe spectroscopy (OPTP), which permits the relationship between structural phase transition and optical property transitions to be examined. Using THz-TDS, we demonstrated that optical conductance and carrier concentration change as a function of annealing temperature with a contact-free optical technique. Moreover, we observed that the topological surface state (TSS) affects the degree of enhancement of carrier lifetime, which is closely related to the degree of spin-orbit coupling (SOC). The combination of an optical technique and a proposed carrier relaxation mechanism provides a powerful tool for monitoring TSS and SOC. Consequently, the response of the amorphous phase is dominated by an electron-phonon coupling effect, while that of the crystalline structure is controlled by a Dirac surface state and SOC effects. These results are important for understanding the fundamental physics of phase change materials and for optimizing and designing materials with better performance in optoelectronic devices.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.1
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• pp.7-12
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• 2006

Local minority carrier lifetime control by means of particle irradiation is an useful technology for Production of modern silicon Power devices. Crystal damage due to ion irradiation can be easily localized by choosing appropriate irradiation energy and minority tarrier lifetime can be reduced locally only in the damaged layer. In this work, proton irradiation technology was used for improving the switching characteristics of a un diode. The irradiation was carried out with various energy and dose condition. The device was characterized by current-voltage, capacitance-voltage, and reverse recovery time measurements. Forward voltage drop was increased to 1.1 V at forward current of 5 A, which was $120\%$ of its original device. Reverse leakage current was 64 nA at reverse voltage of 100 V, and reverse breakdown voltage was 670 V which was the same voltage as original device without irradiation. The reverse recovery time of device was reduced to about $20\%$ compared to that of original device without irradiation.

• Transactions on Electrical and Electronic Materials
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• v.10 no.3
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• pp.75-79
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• 2009

An intrinsic silicon thin film passivation layer is deposited by the microwave remote-plasma enhanced chemical vapor deposition at temperature of $175^{\circ}C$ and various gas ratios for solar cell applications. The good quality amorphous silicon films were formed at silane $(SiH_4)$ gas flow rates above 15 seem. The highest effective carrier lifetime was obtained at the $SiH_4$, flow rate of 20 seem and the value was about 3 times higher compared with the bulk lifetime of 5.6 ${\mu}s$ at a fixed injection level of ${\Delta}n\;=\;5{\times}10^{14}\;cm^{-3}$. An annealing treatment was performed and the carrier life times were increased approximately 5 times compared with the bulk lifetime. The optimal annealing temperature and time were obtained at 250 $^{\circ}C$ and 60 sec respectively. This indicates that the combination of the deposition of an amorphous thin film at a low temperature and the annealing treatment contributes to the excellent surface and bulk passivation.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1947-1949
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• 1999

Carrier lifetime in silicon power devices caused switching delay and excessive power loss at high frequency switching. We studied transient turn-on/turn-off transient characteristics of electron irradiated and proton irradiated silicon pn junction diodes. Both the electron and proton irradiation of power devices have already become a widely used practice to reduce minority carrier lifetime locally[1]. The sample is n+p junction diode, made by ion implantation on a $20\Omega.cm$ p-type wafer. We investigated turn-on/turn-off transient & breakdown voltage characteristics by digital oscilloscope. Our data show that proton irradiated samples show better performance than electron irradiated samples.