• Journal of the Korean Society for Precision Engineering
• /
• 제29권5호
• /
• pp.563-571
• /
• 2012

In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

• Journal of the Microelectronics and Packaging Society
• /
• 제27권1호
• /
• pp.17-24
• /
• 2020

As an interconnect scaling faces a technical bottleneck, the device stacking technologies have been developed for miniaturization, low cost and high performance. To manufacture a stacked device structure, a vertical interconnect becomes a key process to enable signal and power integrities. Most bonding materials used in stacked structures are currently solder or Cu pillar with Sn cap, but copper is emerging as the most important bonding material due to fine-pitch patternability and high electrical performance. Copper bonding has advantages such as CMOS compatible process, high electrical and thermal conductivities, and excellent mechanical integrity, but it has major disadvantages of high bonding temperature, quick oxidation, and planarization requirement. There are many copper bonding processes such as dielectric bonding, copper direct bonding, copper-oxide hybrid bonding, copper-polymer hybrid bonding, etc.. As copper bonding evolves, copper-oxide hybrid bonding is considered as the most promising bonding process for vertically stacked device structure. This paper reviews current research trends of copper bonding focusing on the key process of Cu-SiO₂ hybrid bonding.

• Journal of the Semiconductor & Display Technology
• /
• 제21권1호
• /
• pp.142-147
• /
• 2022

After introducing Hybrid Bonding technology into image sensors using stacked sensors and image processors, large quantity production became possible. As a result, it is currently used in most of the CMOS image market in smartphones and other image-based devices worldwide, and almost all stacked CIS manufacturing sites have focused on miniaturization using hybrid bonding. In this study, an upper wafer handling module for Wafer to Wafer Hybrid Bonding developed to increase the alignment and precision between wafers when wafer bonding. The module was divided two parts to reduce error of both the alignment and degree of precision during wafer bonding. Wafer handling module developed both new Tip/Tilt system controlling θx,θy of upper wafer and striker to push upper wafer. Based on this, it was confirmed through the stability evaluation that the upper wafer handling module can be controlled without any problem during W2W hybrid bonding.

• Journal of the Korean Society for Precision Engineering
• /
• 제27권7호
• /
• pp.28-35
• /
• 2010

In the display industry, COG bonding method is being applied to production of LCD panels that are used for mobile phones and monitors, and is one of the mounting methods optimized to compete with the trend of ultra small, ultra thin and low cost of display. In COG bonding process, electrical characteristics such as contact resistance, insulation property, etc and mechanical characteristics such as bonding strength, etc depend on properties of conductive particles and epoxy resin along with ACF materials used for COG by manufacturers. As the properties of such materials have close relation to optimization of bonding conditions such as temperature, pressure, time, etc in COG bonding process, it is requested to carry out an in-depth study on characteristics of COG bonding, based on which development of bonding process equipment shall be processed. In this study were analyzed the characteristics of COG bonding process, performed the analysis and reliability evaluation on electrical and mechanical characteristics of COG bonding using ACF to find optimum bonding conditions for ACF, and performed the experiment on bonding characteristics regarding fine pitch to understand the affection on finer pitch in COG bonding. It was found that it is difficult to find optimum conditions because it is more difficult to perform alignment as the pitch becomes finer, but only if alignment has been made, it becomes similar to optimum conditions in general COG bonding regardless of pitch intervals.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• 제23권1호
• /
• pp.29-33
• /
• 2010

As the demands for the higher data transmission speed and capacity as well as integration density grow throughout the network, much works have being done in order to integrate the Electrical PCB with Optical PCB. However, one of the most troublesome problems in the commercial bonding process is to need the high temperature for the bonding. Due to the high temperature bonding process, lots of side problems are followed such as warpage and crack, etc. In this paper, we tried to develop the new bonding technology with low temperature around $100^{\circ}C$. As a result of this study, the PCB bonding technology with high bonding strength is demonstrated with the value of bonding strength from 7 to 8 MPa at the temperature of $100^{\circ}C$.

• Journal of Welding and Joining
• /
• 제29권1호
• /
• pp.52-58
• /
• 2011

In this paper, the direct bonding process between FPCB and HPCB was studied. By using an ultrasonic horn which is mounted on the ultrasonic bonding machine, it is alternatively possible to bond the gold pads attached on the FPCB and HPCB at room temperature without an adhesive like ACA or NCA. The process condition for obtaining more bonding strength than 0.6 Kgf, which is commercially required, was carried out as 40 kHz of frequency, 0.6 MPa of bonding pressure and 2 second of bonding time. The peel off test was performed for evaluating bonding strength which results in more than 0.8 Kgf.

• Journal of Welding and Joining
• /
• 제31권6호
• /
• pp.77-83
• /
• 2013

3D packaging technology using TSV (Through Silicon Via)has been studied in the recent years to achieve higher performance, lower power consumption and smaller package size because electrical line is shorter electrical resistivity than any other packaging technology. To stack TSV chips vertically, reliable and robust bonding technology is required because mechanical stress and thermal stress cause fracture during the bonding process. Cu pillar/solder ${\mu}$-bump bonding process is usually to interconnect TSV chips vertically although it has weak shape to mechanical stress and thermal stress. In this study, we suggest Insert-Bump (ISB) bonding process newly to stack TSV chips. Through experiments, we tried to find optimal bonding conditions such as bonding temperature and bonding pressure. After ISB bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test.

• Journal of the Semiconductor & Display Technology
• /
• 제10권2호
• /
• pp.103-108
• /
• 2011

Ultrasonic welding is widely used in bonding of the same kind or dissimilar materials. The important variable of ultrasonic bonding is the bonding pressure, bonding time and applied amplitude energy. These variables have to be optimized in order to obtain the optimum bonding results. In this research, the important factor to optimal bonding between metal and glass were experimentally investigated by applying design of experiment.

• Journal of the Semiconductor & Display Technology
• /
• 제4권2호
• /
• pp.33-37
• /
• 2005

Bare-chip packaging becomes more popular along with the miniaturization of IT components. In this paper, we have studied flip-chip process, and developed automated bonding system. Among the several bonding method, NCP bonding is chosen and batch-type equipment is manufactured. The dual optics and vision system aligns the chip with the substrate. The bonding head equipped with temperature and force controllers bonds the chip. The system can be easily modified fer other bonding methods such as ACF.

• Proceedings of the KWS Conference
• /
• 대한용접접합학회 2002년도 Proceedings of the International Welding/Joining Conference-Korea
• /
• pp.785-790
• /
• 2002

Distributions of residual stress in diffusion bonding of dissimilar materials intermetallics TiAl to steel 40Cr were simulated by FEM calculation. Results showed that destructive residual stresses presented in the minute area adjacent to bond-line of the base material with smaller coefficient of thermal expansion. Reducing bonding temperature and diminishing bonding time are in favor of the mollification of interface tresses.