• Journal of Korea Society of Digital Industry and Information Management
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• v.19 no.2
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• pp.11-25
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• 2023

With the increasing advancement of VLSI technology, health care system is also developing to serve the humanity with better care. Therefore, biomedical implantable devices are one of the amazing important invention of scientist to collect data from the body cell for the diagnosis of diseases without any pain. This Biomedical implantable transceiver circuit has several important issues. Oscillator is one of them. For the design flexibility and complete transistor-based architecture ring oscillator is favorite to the oscillator circuit designer. This paper represents the design and analysis of the a 9-stage CMOS ring oscillator using cadence virtuoso tool in 180nm technology. It is also designed to generate the carrier signal of 403.5MHz frequency. Ring oscillator comprises of odd number of stages with a feedback circuit forming a closed loop. This circuit was designed with 9-stages of delay inverter and simulated for various parameters such as delay, phase noise or jitter and power consumption. The average power consumption for this oscillator is 9.32㎼ and average phase noise is only -86 dBc/Hz with the source voltage of 0.8827V.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.22 no.11
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• pp.1042-1048
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• 2012

A 2-axis gimbal system is one of main disturbance sources affecting image jitter response of a satellite. The gimbal system comprises azimuth stage and elevation stage, and these pointing mechanism can be rotated by stepping motors about its azimuth and elevation axes simultaneously. Because of the complex and coupled dynamic motion of the gimbal system, its moment of inertia and structural modes can be changed according to the system configuration, and thus the gimbal system generates complicated and non-linear disturbance characteristics. In order to improve the jitter response of a spacecraft, it is an indispensable process to reduce the micro-vibration disturbance level of the antenna system. In the present research, a 2-axis gimbal system was manufactured and then its micro-vibration test was performed in terms of two types of stepping motors(2-phase and 5-phase). The test results show that the disturbance level of the gimbal system can be reduced by replacing the 2-phase stepping motor with the 5-phase one, and the average disturbance attenuation ratio is 56 % in peak level and 48 % in standard deviation level. The experimental results confirm that it is an efficient jitter reduction method to adopt a high-phase stepping motor.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.133-138
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.2
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• pp.324-328
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• 2012

A recovered jitter of CDR(Clock and Data Recovery) Circuit based on Dual-loop DLL(Delay Locked Loop) for data recovery in high speed serial data communication is changed by depending on the input data and reference clock frequency. In this paper, 2-step DPC which has constant jitter performance for wide-range input frequency is proposed. The designed prototype 2-step CDR using proposed 2-step DPC has operation frequency between 200Mbps and 4Gbps. Average delay step of 2-step DPC is 10ps. Designed CDR circuit was tested with 0.18um CMOS process.

• Proceedings of the KSPS conference
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• 2002.11a
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• pp.133-136
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• 2002

The purpose of this study was to determine the correlation between the Average Fundamental Frequency, Fo-Tremor Frequency, Jitter, Shimmer, Amplitude Tremor Intensity Index, and Noise to Harmonic Ratio of MDVP and Fo, Fo Tremor, Jitter, Shimmer, Amp Tremor, HNR, and NNE of Dr. Speech. The Pearson correlation coefficient was used for analysis. The results showed that there was a strong correlation between Fo and Shimmer of both instruments. However, the remaining parameters did not show a significant correlation.

• The Transactions of the Korea Information Processing Society
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• v.6 no.7
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• pp.1877-1883
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• 1999

Synchronization of the clock at the ATM receiving terminal is studied. The technique analyzed here has been adapted by ITU-T as the standard for ATM timing recovery. This paper presents analysis of SRTS method itself and jitter in SRTS. The power pectrum and rms amplitude of SRTS jitter are calculated. The calculated average rms value for T1 1.544MHz source signal is 32.63ns and 0.15ns for E4 139.264MHz signal.

• Phonetics and Speech Sciences
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• v.15 no.4
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• pp.45-51
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• 2023

Voice issues such as voice weakness that arise with age can have social and emotional impacts, potentially leading to feelings of isolation and depression. This study aimed to investigate the changes in acoustic characteristics resulting from aging, focusing on voice quality and spoken fluency. To this end, tasks involving sustained vowel phonation and paragraph reading were recorded for 20 elderly and 20 young participants. Voice-quality-related variables, including F0, jitter, shimmer, and Cepstral Peak Prominence (CPP) values, were analyzed along with speech-fluency-related variables, such as average syllable duration (ASD), articulation rate (AR), and speech rate (SR). The results showed that in voice quality-related measurements, F0 was higher for the elderly and voice quality was diminished, as indicated by increased jitter, shimmer, and lower CPP levels. Speech fluency analysis also demonstrated that the elderly spoke more slowly, as indicated by all ASD, AR, and SR measurements. Correlation analysis between voice quality and speech fluency showed a significant relationship between shimmer and CPP values and between ASD and SR values. This suggests that changes in spoken fluency can be identified early by measuring the variations in voice quality. This study further highlights the reciprocal relationship between voice quality and spoken fluency, emphasizing that deterioration in one can affect the other.

• Speech Sciences
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• v.14 no.1
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• pp.151-162
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• 2007

This study focuses on the classification of pathological voice using GMM (Gaussian Mixture Model) and compares the results to the previous work which was done by ANN (Artificial Neural Network). Speech data from normal people and patients were collected, then diagnosed and classified into two different categories. Six characteristic parameters (Jitter, Shimmer, NHR, SPI, APQ and RAP) were chosen. Then the classification method based on the artificial neural network and Gaussian mixture method was employed to discriminate the data into normal and pathological speech. The GMM method attained 98.4% average correct classification rate with training data and 95.2% average correct classification rate with test data. The different mixture number (3 to 15) of GMM was used in order to obtain an optimal condition for classification. We also compared the average classification rate based on GMM, ANN and HMM. The proper number of mixtures on Gaussian model needs to be investigated in our future work.

• Journal of Information Processing Systems
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• v.15 no.2
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• pp.271-287
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• 2019

The synchronization scheme based on moving average is robust and suitable for the same rule to be adopted in embedding watermark and synchronization code, but the imperceptibility and search efficiency is seldom reported. The study aims to improve the original scheme for robust audio watermarking. Firstly, the survival of the algorithm from desynchronization attacks is improved. Secondly, the scheme is improved in inaudibility. Objective difference grade (ODG) of the marked audio is significantly changed. Thirdly, the imperceptibility of the scheme is analyzed and the derived result is close to experimental result. Fourthly, the selection of parameters is optimized based on experimental data. Fifthly, the search efficiency of the scheme is compared with those of other synchronization code schemes. The experimental results show that the proposed watermarking scheme allows the high audio quality and is robust to common attacks such as additive white Gaussian noise, requantization, resampling, low-pass filtering, random cropping, MP3 compression, jitter attack, and time scale modification. Moreover, the algorithm has the high search efficiency and low false alarm rate.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.7
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• pp.1261-1266
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• 2017

A random and systematic jitter suppressed delay locked loop (DLL)-based clock generator with a delay-time voltage variance converter (DVVC) and an averaging circuit (AC) is presented. The DVVC senses the delay variance of each delay stage and generates a voltage. The AC averages the output voltages of two consecutive DVVCs to suppress the systematic and random delay variance of each delay stage in the VCDL. The DVVC and AC averages the delay time of successive delay stages and equalizes the delay time of all delay stages. In addition, a capacitor with a switch working effectively as a negative feedback function is introduced to reduce the variation of the loop filter output voltage. Measurement results of the DLL-based clock generator fabricated in a one-poly six-metal $0.18{\mu}m$ CMOS process shows 13.4-ps rms jitter.