• 한국인터넷방송통신학회논문지
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• 제10권1호
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• pp.7-13
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• 2010

질소 분위기하에서 분자선 에피탁시 장치로 성장한 GaN 에피층을 고온 열처리 하였다. 시료는 적절한 조건하에서 급속 열처리 후 구조적인 특성의 향상을 나타내었다. 시료의 결정성의 향상은 에피층의 격자 관련 요소들의 흐트러짐의 감소에 기인한다. 에피층의 열처리는 950도의 급속 열처리로를 이용하여 수행하였다. 고온 급속 열처리가 GaN 에피층의 구조적인 특성들에 미치는 효과는 x선 회절을 통하여 연구하였다. x선 회절 스펙트럼에 있어서 Bragg 피크는 열처리 시간이 증가할수록 각도가 큰 쪽으로 이동하였다. 또한 피크의 FWHM은 열처리 시간이 증가함에 따라 약간의 증가 후 감소하였으며 이후 다시 증가하였다. 이와 같은 결과는 급속 고온 열처리된 GaN 에피층에서 격자 상수에 영향을 미치는 인자들이 에피층의 품질을 좋게 하는 방향으로 일률적으로 변화하는 것이 아니라 에피 품질을 나쁘게 하는 방향으로도 변화한다는 것을 의미한다. 적절한 조건 하에서의 급속 열처리는 에피층의 격자 상수에 관여하는 인자들의 흐트러짐을 감소시켜 에피 결정의 질을 향상시킨다.

• 전기전자학회논문지
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• 제23권2호
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• pp.704-709
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• 2019

본 논문에서는 다양한 열처리(annealing) 조건에서 tunneling field effect transistor(TFET)의 전기적 특성을 연구 하였다. TFET 샘플은 수소 혼합 가스(4 %) 및 중수소($D_2$) 혼합 가스 (4 %)를 사용하여 열처리를 진행하였으며 측정은 노이즈 차폐실에서 진행되었다. 실험 결과, 열처리 전과 비교하여 열처리 공정 후에 subthreshold slope(SS)이 33 mV / dec만큼 감소함을 확인할 수 있었다. 그리고 측정 온도 범위에서 온도가 증가할수록 $V_G=3V$ 조건에서 10 기압의 중수소 혼합 가스에 대해 평균 31.2 %의 노이즈가 개선됨을 확인할 수 있었다. $D_2$ 혼합 가스로 메탈 증착 후 열처리 공정(post metal annealing)을 실시한 결과, $I_D=100nA$ 조건에서 평균 30.7 %의 노이즈가 감소되었음을 확인할 수 있다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1277-1280
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• 2007

Isothermal activation annealing was carried out using boron doped SLS poly-using an RTA system. We observed different behavior of reverse annealing depending on the implantation conditions.

• 한국진공학회지
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• 제8권3B호
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• pp.333-339
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• 1999

$RuO_2$ thin films were prepared with various deposition conditions by rf magnetron sputtering. The films were annealed in vacuum, air, and air-vacuum, after that, the structural and electrical properties of the films were investigated. As the substrate temperature increases, the preferred orientation of the films changes from (101) to (200), and the grain size increases; especially, at $500^{\circ}C$, the size considerably increases. The preferred orientation of the films changes from (200) to (101) and the roughness of surface increase with the increase in oxygen partial pressure. The lowest value of resistivity of $RuO_2$ we prepared is $1.5\times 10^{-5}\Omega\codt\textrm{cm}$ at the conditions of $400^{\circ}C$ and 10% of oxygen partial pressure. After the processes of annealing, the films deposited at $400^{\circ}C$ and a oxygen partial pressure of 10% were relatively stable. The films deposited at $500^{\circ}C$ have denser structure and smoother surface when the films are annealed in vacuum after annealing in air.

• Progress in Superconductivity
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• 제3권2호
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• pp.168-171
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• 2002

We have demonstrated ramp-edge Josephson junctions using high temperature superconductors without depositing artificial barriers. We fabricated a surface barrier formed naturally during an ion beam etching process and the annealing under the oxygen atmosphere. The experimental results imply that the barrier natures such as the resistivity are varied by the annealing conditions and the ion milling conditions including the beam voltages. Thus, the ann eating and etching conditions should be optimized to obtain excellent junction properties. In optimizing the fabricating factors, the interface-controlled junctions showed resistively shunted junctions like current-voltage characteristics and an excellent uniformity. These junctions exhibited a spread ($1\sigma$) of $I_{c}$ is 10% fur chips containing 7 junctions at 50K.K.

• 한국재료학회지
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• 제18권9호
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• pp.486-491
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• 2008

The effect of annealing treatment conditions on the interfacial adhesion energy between electrolessplated Ni film and polyimide substrate was evaluated using a $180^{\circ}$ peel test. Measured peel strength values are $26.9{\pm}0.8,\;22.4{\pm}0.8,\;21.9{\pm}1.5,\;23.1{\pm}1.3,\;16.1{\pm}2.0\;and\;14.3{\pm}1.3g/mm$ for annealing treatment times during 0, 1, 3, 5, 10, and 20 hours, respectively, at $200^{\circ}C$ in ambient environment. XPS and AES analysis results on peeled surfaces clearly reveal that the peeling occurs cohesively inside polyimide. This implies a degradation of polyimide structure due to oxygen diffusion through interface between Ni and polyimide, which is also closely related to the decrease in the interfacial adhesion energy due to thermal treatment in ambient conditions.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
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• pp.30-33
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• 2004

Shallow p+-n junctions were formed by low-energy ion implantation and dual-step annealing processes The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a rapid thermal processor and a furnace. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of junction depth. A new simulator is designed to model boron diffusion in silicon, which is especially useful for analyzing the annealing process subsequent to ion implantation. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. Using a resonable parameter values, the simulator covers not only the equilibrium diffusion conditions but also the nonequilibrium post-implantation diffusion. Using initial conditions and boundary conditions, coupled diffusion equation is solved successfully. The simulator reproduced experimental data successfully.

• Transactions on Electrical and Electronic Materials
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• 제16권2호
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• pp.99-102
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• 2015

Thin film transistors (TFTs) with amorphous 2 wt% silicon-doped zinc tin oxide (a-2SZTO) channel layer were fabricated using an RF magnetron sputtering system, and the effect of post-annealing treatment time on the structural and electrical properties of a-2SZTO systems was investigated. It is well known that Si can effectively reduce the generation of oxygen vacancies. However, it is interesting to note that prolonged annealing could have a bad effect on the roughness of a-2SZTO systems, since the roughness of a-2SZTO thin films increases in proportion to the thermal annealing treatment time. Thermal annealing can control the electrical characteristics of amorphous oxide semiconductor (AOS) TFTs. It was observed herein that prolonged annealing treatment can cause bumpy roughness, which led to increase of the contact resistance between the electrode and channel. Thus, it was confirmed that deterioration of the electrical characteristics could occur due to prolonged annealing. The longer annealing time also decreased the field effect mobility. The a-2SZTO TFTs annealed at 500℃ for 2 hours displayed the mobility of 2.17 cm²/Vs. As the electrical characteristics of a-2SZTO annealed at a fixed temperature for long periods were deteriorated, careful optimization of the annealing conditions for a-2SZTO, in terms of time, should be carried out to achieve better performance.

• 한국전기전자재료학회논문지
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• 제23권12호
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• pp.966-972
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• 2010

Single-phase $Sr_2FeMoO_6$ thin films were produced by RF magnetron sputtering for use as electrodes in integrated sensors and found to be good conductors at room temperature. The films were deposited from a powder-type sputtering target under various conditions, and were crystallized by annealing. Elimination of $O_2$ gas during deposition, by the use of a solely Ar sputtering gas under a working pressure as low as possible, and vacuum annealing were important to promote the $Sr_2FeMoO_6$ phase. However, oxygen exclusion from sputtering and annealing was not enough to yield single-phase $Sr_2FeMoO_6$: hydrogen annealing was also required. Film production was optimized by varying the deposition parameters and hydrogen annealing conditions. The film had good electrical conduction, with a low resistivity of $1.6{\times}10^{-2}\Omega{\cdot}cm$ at room temperature.

• 산업진흥연구
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• 제1권1호
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• pp.7-11
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• 2016

IGZO의 접합특성을 조사하기 위해서 진공 중에서와 대기 중에서 열처리를 하여, 전지적인 특성을 조사하였다. 진공 중에서 열처리를 한 IGZO는 비정질특성을 나타내었지만 대기 중에서 열처리를 하면 결정질 특성을 가졌다. 열처하는 방법에 따라서 산소공공의 함량이 달라지기 때문이다. 대기 중에서 열처리를 하면 IGZO의 산소공공이 증가하였다. 산소공공은 전류를 증가시키고 따라서 대기 중에서 열처리를 한 IGZO는 오믹 접합을 나타내었다. 그러나 진공 중에서 열처리를 한 IGZO는 쇼키접합을 나타냈다.