• 한국전자통신학회논문지
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• 제14권3호
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• pp.497-504
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• 2019

본 연구에서는 고주파 마그네트론 스퍼터링 법을 이용하여 $HfO_2$ 박막을 제작하고, 질소 분위기에서 급속 열처리 온도에 따른 $HfO_2$ 박막의 구조적 및 광학적 특성을 조사하였다. XRD 측정을 통해 열처리 유무에 상관없이 $HfO_2$ 박막은 다결정 구조를 가짐을 확인할 수 있었고, 열처리 온도가 증가함에 따라 반가폭은 감소하는 추세를 나타내었다. 박막의 표면을 AFM 으로 조사한 결과, $600^{\circ}C$ 에서 열처리한 박막의 표면 거칠기가 3.454 nm 로 가장 작은 값을 나타내었다. 모든 $HfO_2$ 박막들은 가시광 영역에서 약 80% 정도의 투과도를 나타내었다. 또한 투과도와 반사도로부터 구한 굴절률과 셀마이어 분산 관계로부터, 파장에 따른 $HfO_2$ 의 굴절률을 예측할 수 있었다. $600^{\circ}C$ 에서 열처리 한 $HfO_2$ 박막이 2.0223 (${\lambda}=632nm$) 의 높은 굴절률과 0.963 의 높은 우수한 충진율을 나타내었다.

• 한국재료학회지
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• 제14권1호
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• pp.46-51
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• 2004

The annealing of a Cu(4.5at.% Mg)/$SiO_2$/Si structure in ambient $O_2$, at 10 mTorr, and $300-500^{\circ}C$, allows for the outdiffusion of the Mg to the Cu surface, forming a thin MgO (15 nm) layer on the surface. The surface MgO layer was patterned, and successfully served as a hard mask, for the subsequent dry etching of the underlying Mg-depleted Cu films using an $O_2$ plasma and hexafluoroacetylacetone [H(hfac)] chemistry. The resultant MgO/Cu structure, with a taper slope of about $30^{\circ}C$ shows the feasibility of the dry etching of Cu(Mg) alloy films using a surface MgO mask scheme. A dry-etched Cu(4.5at.% Mg) gate a-Si:H TFT has a field effect mobility of 0.86 $\textrm{cm}^2$/Vs, a subthreshold swing of 1.08 V/dec, and a threshold voltage of 5.7 V. A novel process for the dry etching of Cu(Mg) alloy films, which eliminates the use of a hard mask, such as Ti, and results in a reduction in the process steps is reported for the first time in this work.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권7호
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• pp.521-524
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• 1999

Nb silicide was formed on the Si micro-tip arrays in order to improve field emission properties of Si-tip field emitter array. After silicidization of the tips, the etch-back process, by which gate insulator, gate electrode and photoresist were deposited sequentially and gate holes were defined by removing gradually the photoresist by $O_2$ plasma from the surface, was applied. Si nitride film was used as a protective layer in order to prevent oxygen from diffusion into Nb silicide layer and it was identified that the NbSi2 was formed through annealing in $N_2$ ambient at $1100^{\circ}C$ for 1 hour. By the Nb silicide coating on Si tips, the turn-on voltage was decreased from 52.1 V to 32.3 V and average current fluctuation for 1 hour was also reduced from 5% to 2%. Also, the fabricated Nb silicide-coated Si tip FEA emitted electrons toward the phosphor and light emission was obtained at the gate voltage of 40~50 V.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.242-242
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• 2012

Transparent oxide semiconductors are increasingly becoming one of good candidates for high efficient channel materials of thin film transistors (TFTs) in large-area display industries. Compare to the conventional hydrogenated amorphous silicon channel layers, solution processed ZnO-TFTs can be simply fabricated at low temperature by just using a spin coating method without vacuum deposition, thus providing low manufacturing cost. Furthermore, solution based oxide TFT exhibits excellent transparency and enables to apply flexible devices. For this reason, this process has been attracting much attention as one fabrication method for oxide channel layer in thin-film transistors (TFTs). But, poor electrical characteristic of these solution based oxide materials still remains one of issuable problems due to oxygen vacancy formed by breaking weak chemical bonds during fabrication. These electrical properties are expected due to the generation of a large number of conducting carriers, resulting in huge electron scattering effect. Therefore, we study a novel technique to effectively improve the electron mobility by applying environmental annealing treatments with various gases to the solution based Li-doped ZnO TFTs. This technique was systematically designed to vary a different lithium ratio in order to confirm the electrical tendency of Li-doped ZnO TFTs. The observations of Scanning Electron Microscopy, Atomic Force Microscopy, and X-ray Photoelectron Spectroscopy were performed to investigate structural properties and elemental composition of our samples. In addition, I-V characteristics were carried out by using Keithley 4,200-Semiconductor Characterization System (4,200-SCS) with 4-probe system.

• 마이크로전자및패키징학회지
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• 제7권2호
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• pp.1-6
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• 2000

X-선 노광용 마스크의 재료로서 SiC와 Ta박막을 각각 ECR플라즈마 CVD, 스퍼터링 장비를 이용하여 증착한 뒤 잔류응력, 미세구조, 표면상태, 그리고 화학적 결합상태 등을 조사하였고, ECR etching system을 이용하여 Ta박막 미세 식각 특성을 연구하였다. SiC박막은 $N_2$분위기에서 RTA를 통하여 X-선 투과막 물질로서 필요한 적절한 인장응력을 변화 시킬 수 있었고, 공정 압력을 조절하여 증착한 Ta박막은 높은 밀도와 우수한 표면 평활도를 가지고 시간과 온도에 따른 응력의 안정성이 좋은 X-선 흡수체를 증착할 수 있었다. 또한 Cl 플라즈마는 흡수체 물질 Ta에 대해 좋은 식각특성을 보였고, two-step 식각을 통해 microloading effect를 억제함으로써 0.2 $\mu\textrm{m}$이하의 미세패턴을 식각해 낼 수 있었다.

• 한국재료학회지
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• 제14권7호
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• pp.489-493
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• 2004

The electrical property of MMC is essentially important to some applications such as power transmission lines and cables, electronic and electrical components as well as electromagnetic shielding equipments. The behavior of electrical resistivity of $SiC_{w}/Al$ alloy composites under as-extruded and annealed conditions has been investigated within the temperature range from room temperature to $450^{\circ}C$. It can be seen that within entire temperature range, the electrical resistivity of composites was higher than that of an unreinforced matrix alloy under the same condition of either as-extrusion or annealing. The temperature dependence of both exhibited positive incline like a typical metal. The variation of electrical resistivity of an unreinforced matrix alloy with temperature from ambient temperature to $450^{\circ}C$ was nearly monotonous, while those of composites increased monotonously at low temperature and rose to a high level after about $250^{\circ}C or 275^{\circ}C$. The difference of these temperature dependences on electrical resistivity can be interpreted as qualitatively the interfaces of $SiC_{w}$ fibers and matrix, where act as nucleation sites.

• Transactions on Electrical and Electronic Materials
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• 제14권5호
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• pp.246-249
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• 2013

Graphene was obtained on Cu foil by thermal decomposition method. A gas mixture of $H_2$ and $CH_4$ and an ambient annealing temperature of $1,000^{\circ}C$ were used during the deposition for 30 Min., and for the transfer onto $SiO_2/Si$ and Si substrates. The physical properties of graphene were investigated with regard to the effect ofnitrogen atom doping and the various substrates used. The G/2D ratio decreased when the graphene became monolayer graphene. The graphene grown on $SiO_2/Si$ substrate showed a low intensity of the G/2D ratio, because the polarity of the $SiO_2$ layer improved the quality of graphene. The intensity of the G/2D ratio of graphene doped with nitrogen atoms increased with the doping time. The quality of graphene depended on the concentration of the nitrogen doping and chemical properties of substrates. High-quality monolayer graphene was obtained with a low G/2D ratio. The increase in the intensity of the G/2D ratios corresponded to a blue shift in the 2D peaks.

• 한국분말재료학회지
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• 제16권4호
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• pp.243-248
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• 2009

Carbon-coated Cu nanopowders with core/shell structure have been successfully fabricated by pulsed wire evaporation (PWE) method, in which a mixed gas of Ar/$CH_4$ (10 vol.%) was used as an ambient gas. The characterization of the samples was carried out using x-ray diffraction (XRD), scanning electron microscope (SEM), and high resolution transmission electron microscope (HRTEM). It was found that the nanoparticles show a spherical morphology with the size ranging of 10-40 nm and are covered with graphite layers of 2-4 nm. When oxygen-passivated Cu nanopowders were annealed under flowing argon gas (600 and 800$^{\circ}C$), the crystallinity of $Cu_2O$ phase and the particle size gradually increased. On the other hand, carbon-coated Cu nanopowders remained similar to as-prepared case with no additional oxide or carbide phases even after the annealing, indicating that the metal nanoparticles are well protected by the carbon-coating layers.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.70-73
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• 2001

MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

• 한국재료학회지
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• 제13권7호
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• pp.460-464
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• 2003

Ni and Ti films were deposited by the thermal evaporator, and then annealed in the N$_2$ ambient at 300-80$0^{\circ}C$ in a RTA(rapid thermal annealing) system. Four point probe, AEM, FESEM, AES, and XPS were used to study the effects of Ti-capping layers on the thermal stability of NiSi thin films. The Ti-capped NiSi was stable up to $700^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after $600^{\circ}C$. These results were due to that the Ni in-diffusion and Si out-diffusion were retarded by the capping layer, resulting in the suppression of the formation of NiSi$_2$and Si grains at the surface.