• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.3
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• pp.497-504
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• 2019

We fabricated $HfO_2$ thin films using RF magnetron sputtering method, and investigated structural and optical properties of $HfO_2$ thin films with RTA temperatures in $N_2$ ambient. $HfO_2$ thin films exhibited polycrystalline structure regardless of annealing process, FWHM of M (-111) showed reduction trend. The surface roughness showed the smallest of 3.454 nm at a annealing temperature of $600^{\circ}C$ in result of AFM. All $HfO_2$ thin films showed the transmittance of about 80% in visible light range. By fitting the refractive index from the transmittance and reflectance to the Sellmeir dispersion relation, we can predict the refractive index of the $HfO_2$ thin film according to the wavelength. The $HfO_2$ thin film annealed at $600^{\circ}C$ exhibited a high refractive index of 2.0223 (${\lambda}=632nm$) and an excellent packing factor of 0.963.

• Korean Journal of Materials Research
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• v.14 no.1
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• pp.46-51
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• 2004

The annealing of a Cu(4.5at.% Mg)/$SiO_2$/Si structure in ambient $O_2$, at 10 mTorr, and $300-500^{\circ}C$, allows for the outdiffusion of the Mg to the Cu surface, forming a thin MgO (15 nm) layer on the surface. The surface MgO layer was patterned, and successfully served as a hard mask, for the subsequent dry etching of the underlying Mg-depleted Cu films using an $O_2$ plasma and hexafluoroacetylacetone [H(hfac)] chemistry. The resultant MgO/Cu structure, with a taper slope of about $30^{\circ}C$ shows the feasibility of the dry etching of Cu(Mg) alloy films using a surface MgO mask scheme. A dry-etched Cu(4.5at.% Mg) gate a-Si:H TFT has a field effect mobility of 0.86 $\textrm{cm}^2$/Vs, a subthreshold swing of 1.08 V/dec, and a threshold voltage of 5.7 V. A novel process for the dry etching of Cu(Mg) alloy films, which eliminates the use of a hard mask, such as Ti, and results in a reduction in the process steps is reported for the first time in this work.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.7
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• pp.521-524
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• 1999

Nb silicide was formed on the Si micro-tip arrays in order to improve field emission properties of Si-tip field emitter array. After silicidization of the tips, the etch-back process, by which gate insulator, gate electrode and photoresist were deposited sequentially and gate holes were defined by removing gradually the photoresist by $O_2$ plasma from the surface, was applied. Si nitride film was used as a protective layer in order to prevent oxygen from diffusion into Nb silicide layer and it was identified that the NbSi2 was formed through annealing in $N_2$ ambient at $1100^{\circ}C$ for 1 hour. By the Nb silicide coating on Si tips, the turn-on voltage was decreased from 52.1 V to 32.3 V and average current fluctuation for 1 hour was also reduced from 5% to 2%. Also, the fabricated Nb silicide-coated Si tip FEA emitted electrons toward the phosphor and light emission was obtained at the gate voltage of 40~50 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.242-242
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• 2012

Transparent oxide semiconductors are increasingly becoming one of good candidates for high efficient channel materials of thin film transistors (TFTs) in large-area display industries. Compare to the conventional hydrogenated amorphous silicon channel layers, solution processed ZnO-TFTs can be simply fabricated at low temperature by just using a spin coating method without vacuum deposition, thus providing low manufacturing cost. Furthermore, solution based oxide TFT exhibits excellent transparency and enables to apply flexible devices. For this reason, this process has been attracting much attention as one fabrication method for oxide channel layer in thin-film transistors (TFTs). But, poor electrical characteristic of these solution based oxide materials still remains one of issuable problems due to oxygen vacancy formed by breaking weak chemical bonds during fabrication. These electrical properties are expected due to the generation of a large number of conducting carriers, resulting in huge electron scattering effect. Therefore, we study a novel technique to effectively improve the electron mobility by applying environmental annealing treatments with various gases to the solution based Li-doped ZnO TFTs. This technique was systematically designed to vary a different lithium ratio in order to confirm the electrical tendency of Li-doped ZnO TFTs. The observations of Scanning Electron Microscopy, Atomic Force Microscopy, and X-ray Photoelectron Spectroscopy were performed to investigate structural properties and elemental composition of our samples. In addition, I-V characteristics were carried out by using Keithley 4,200-Semiconductor Characterization System (4,200-SCS) with 4-probe system.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.2
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• pp.1-6
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• 2000

X-ray lithography mask with SiC membrane and Ta absorber patterns has been fabricated using ECR plasma CVD, d.c. magnetron sputtering, and ECR plasma etching. The stress of stoichiometric SiC film was adjusted by rapid thermal annealing under $N_2$, ambient. Adjusting the working pressure during sputtering process resulted in a near-zero residual stress, reasonable density, and smooth surface morphology of Ta film. Cl-based plasma showed a good etching characteristics of Ta, and two-step etching process was implemented to suppress microloading effect fur sub-quarter $\mu\textrm{m}$ patterning.

• Korean Journal of Materials Research
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• v.14 no.7
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• pp.489-493
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• 2004

The electrical property of MMC is essentially important to some applications such as power transmission lines and cables, electronic and electrical components as well as electromagnetic shielding equipments. The behavior of electrical resistivity of $SiC_{w}/Al$ alloy composites under as-extruded and annealed conditions has been investigated within the temperature range from room temperature to $450^{\circ}C$. It can be seen that within entire temperature range, the electrical resistivity of composites was higher than that of an unreinforced matrix alloy under the same condition of either as-extrusion or annealing. The temperature dependence of both exhibited positive incline like a typical metal. The variation of electrical resistivity of an unreinforced matrix alloy with temperature from ambient temperature to $450^{\circ}C$ was nearly monotonous, while those of composites increased monotonously at low temperature and rose to a high level after about $250^{\circ}C or 275^{\circ}C$. The difference of these temperature dependences on electrical resistivity can be interpreted as qualitatively the interfaces of $SiC_{w}$ fibers and matrix, where act as nucleation sites.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.246-249
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• 2013

Graphene was obtained on Cu foil by thermal decomposition method. A gas mixture of $H_2$ and $CH_4$ and an ambient annealing temperature of $1,000^{\circ}C$ were used during the deposition for 30 Min., and for the transfer onto $SiO_2/Si$ and Si substrates. The physical properties of graphene were investigated with regard to the effect ofnitrogen atom doping and the various substrates used. The G/2D ratio decreased when the graphene became monolayer graphene. The graphene grown on $SiO_2/Si$ substrate showed a low intensity of the G/2D ratio, because the polarity of the $SiO_2$ layer improved the quality of graphene. The intensity of the G/2D ratio of graphene doped with nitrogen atoms increased with the doping time. The quality of graphene depended on the concentration of the nitrogen doping and chemical properties of substrates. High-quality monolayer graphene was obtained with a low G/2D ratio. The increase in the intensity of the G/2D ratios corresponded to a blue shift in the 2D peaks.

• Journal of Powder Materials
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• v.16 no.4
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• pp.243-248
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• 2009

Carbon-coated Cu nanopowders with core/shell structure have been successfully fabricated by pulsed wire evaporation (PWE) method, in which a mixed gas of Ar/$CH_4$ (10 vol.%) was used as an ambient gas. The characterization of the samples was carried out using x-ray diffraction (XRD), scanning electron microscope (SEM), and high resolution transmission electron microscope (HRTEM). It was found that the nanoparticles show a spherical morphology with the size ranging of 10-40 nm and are covered with graphite layers of 2-4 nm. When oxygen-passivated Cu nanopowders were annealed under flowing argon gas (600 and 800$^{\circ}C$), the crystallinity of $Cu_2O$ phase and the particle size gradually increased. On the other hand, carbon-coated Cu nanopowders remained similar to as-prepared case with no additional oxide or carbide phases even after the annealing, indicating that the metal nanoparticles are well protected by the carbon-coating layers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.70-73
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• 2001

MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.

• Korean Journal of Materials Research
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• v.13 no.7
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• pp.460-464
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• 2003

Ni and Ti films were deposited by the thermal evaporator, and then annealed in the N$_2$ ambient at 300-80$0^{\circ}C$ in a RTA(rapid thermal annealing) system. Four point probe, AEM, FESEM, AES, and XPS were used to study the effects of Ti-capping layers on the thermal stability of NiSi thin films. The Ti-capped NiSi was stable up to $700^{\circ}C$ for 100 sec. RTA, while the uncapped NiSi layers showed high sheet resistance after $600^{\circ}C$. These results were due to that the Ni in-diffusion and Si out-diffusion were retarded by the capping layer, resulting in the suppression of the formation of NiSi$_2$and Si grains at the surface.