• Title/Summary/Keyword: amplifiers

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V-band CPW 3-dB Directional Coupler using Tandem Structure (Tandem구조를 이용한 V-band용 CPW 3-dB 방향성 결합기)

  • Moon Sung-Woon;Han Min;Baek Tae-Jong;Kim Sam-Dong;Rhee Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.7 s.337
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    • pp.41-48
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    • 2005
  • We design and fabricate 3-dB tandem directional coupler using the coplanar waveguide structure which is applicable to balanced amplifiers and mixers for 60 GHz wireless local area network system. The coupler comprises the multiple-sectional parallel-coupled lines to facilitate the fabrication process, and enable smaller device size and higher directivity than those of the conventional 3-dB coupler employing the edge-coupled line. In this study, we adopt the structure of two-sectional parallel-coupled lines of which each single-coupled line has a coupling coefficient of -8.34 dB and airbridge structure to monolithically materialize the uniplanar coupler structure instead of using the conventional multilayer or bonded structure. The airbridge structure also supports to minimize the parasitic components and maintain desirable device performance in V-band (50$\~$75 GHz). The measured results from the fabricated couplers show couplings of 3.S$\~$4 dB and phase differences of 87.5$^{\circ}{\pm}1^{\circ}$ in V-band range and show directivities higher than 30 dB at a frequency of 60 GHz.

Giga WDM-PON based on ASE Injection R-SOA (ASE 주입형 R-SOA 기반 기가급 WDM-PON 연구)

  • Shin Hong-Seok;Hyun Yoo-Jeong;Lee Kyung-Woo;Park Sung-Bum;Shin Dong-Jae;Jung Dae-Kwang;Kim Seung-Woo;Yun In-Kuk;Lee Jeong-Seok;Oh Yun-Je;Park Jin-Woo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.5 s.347
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    • pp.35-44
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    • 2006
  • Reflective semiconductor optical amplifiers(R-SOAs) were designed with high gain, wide optical bandwidth, high thermal reliability and wide modulation bandwidth in TO-can package for the transmitter of wavelength division multiplexed-passive optical network(WDM-PON) application. Double trench structure and current block layer were introduced in designing the active layer of R-SOA to enable high speed modulation. The injection power requirement and the viable temperature range of WDM-PON system are experimentally analysed in based on Amplified Spontaneous Emission(ASE)-injected R-SOAs. The effect of the different injection spectrum in the gain-saturated R-SOA was experimentally characterized based on the measurements of excessive intensity noise, Q factor, and BER. The proposed spectral pre-composition method reduces the bandwidth of injection source below the AWG bandwidth and thereby avoids spectrum distortion impeding the intensity noise reduction originated from the amplitude squeezing.

A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems (초광대역 통신시스템 응용을 위한 이중채널 6b 1GS/s 0.18um CMOS ADC)

  • Cho, Young-Jae;Yoo, Si-Wook;Kim, Young-Lok;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.47-54
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    • 2006
  • This work proposes a dual-channel 6b 1GS/s ADC for ultra wide-band communication system applications. The proposed ADC based on a 6b interpolated flash architecture employs wide-band open-loop track-and-hold amplifiers, comparators with a wide-range differential difference pre-amplifier, latches with reduced kickback noise, on-chip CMOS references, and digital bubble-code correction circuits to optimize power, chip area, and accuracy at 1GS/s. The ADC implemented in a 0.18um 1P6M CMOS technology shows a signal-to-noise-and-distortion ratio of 30dB and a spurious-free dynamic range of 39dB at 1GS/s. The measured differential and integral non-linearities of the prototype ADC are within 1.0LSB and 1.3LSB, respectively. The dual-channel ADC has an active area of $4.0mm^2$ and consumes 594mW at 1GS/s and 1.8V.

A Mismatch-Insensitive 12b 60MS/s 0.18um CMOS Flash-SAR ADC (소자 부정합에 덜 민감한 12비트 60MS/s 0.18um CMOS Flash-SAR ADC)

  • Byun, Jae-Hyeok;Kim, Won-Kang;Park, Jun-Sang;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.7
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    • pp.17-26
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    • 2016
  • This work proposes a 12b 60MS/s 0.18um CMOS Flash-SAR ADC for various systems such as wireless communications and portable video processing systems. The proposed Flash-SAR ADC alleviates the weakness of a conventional SAR ADC that the operation speed proportionally increases with a resolution by deciding upper 4bits first with a high-speed flash ADC before deciding lower 9bits with a low-power SAR ADC. The proposed ADC removes a sampling-time mismatch by using the C-R DAC in the SAR ADC as the combined sampling network instead of a T/H circuit which restricts a high speed operation. An interpolation technique implemented in the flash ADC halves the required number of pre-amplifiers, while a switched-bias power reduction scheme minimizes the power consumption of the flash ADC during the SAR operation. The TSPC based D-flip flop in the SAR logic for high-speed operation reduces the propagation delay by 55% and the required number of transistors by half compared to the conventional static D-flip flop. The prototype ADC in a 0.18um CMOS demonstrates a measured DNL and INL within 1.33LSB and 1.90LSB, with a maximum SNDR and SFDR of 58.27dB and 69.29dB at 60MS/s, respectively. The ADC occupies an active die area of $0.54mm^2$ and consumes 5.4mW at a 1.8V supply.

Development of PC-based and portable high speed impedance analyzer for biosensor (바이오센서를 위한 PC 기반의 휴대용 고속 임피던스 분석기 개발)

  • Kim, Gi-Ryon;Kim, Gwang-Nyeon;Heo, Seung-Deok;Lee, Seung-Hoon;Choi, Byeong-Cheol;Kim, Cheol-Han;Jeon, Gye-Rok;Jung, Dong-Keun
    • Journal of Sensor Science and Technology
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    • v.14 no.1
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    • pp.33-41
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    • 2005
  • For more convenient electrode-electrolyte interface impedance analysis in biosensor, a stand-alone impedance measurement system is required. In our study, we developed a PC-based portable system to analyze impedance of the electrochemical cell using microprocessor. The devised system consists of signal generator, programmable amplifiers, A/D converter, low pass filter, potentiostat, I/V converter, microprocessor, and PC interface. As a microprocessor, PIC16F877 which has the processing speed of 5 MIPS was used. For data acquisition, the sampling rate at 40 k samples/sec, resolution of 12 bit is used. RS-232 with 115.2 kbps speed is used for the PC communication. The square wave was used as stimuli signal for impedance analysis and voltage-controlled current measurement method of three-electrode-method were adopted. Acquired voltage and current data are calculated to multifrequency impedance signal after Fourier transform. To evaluate the implemented system, we set up the dummy cell as equivalent circuit of which was composed of resistor, parallel circuit of capacitor and resistor connected in parallel and measured the impedance of the dummy cell; the result showed that there exist accuracy within 5 % errors and reproduction within 1 % errors compared to output of Hioki LCR tester and HP impedance analyzer as a standard product. These results imply that it is possible to analyze electrode-electrolyte interface impedance quantitatively in biosensor and to implement the more portable high speed impedance analysis system compared to existing systems.

Modeling and Digital Predistortion Design of RF Power Amplifier Using Extended Memory Polynomial (확장된 메모리 다항식 모델을 이용한 전력 증폭기 모델링 및 디지털 사전 왜곡기 설계)

  • Lee, Young-Sup;Ku, Hyun-Chul;Kim, Jeong-Hwi;Ryoo, Kyoo-Tae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.11
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    • pp.1254-1264
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    • 2008
  • This paper suggests an extended memory polynomial model that improves accuracy in modeling memory effects of RF power amplifiers(PAs), and verifies effectiveness of the suggested method. The extended memory polynomial model includes cross-terms that are products of input terms that have different delay values to improve the limited accuracy of basic memory polynomial model that includes the diagonal terms of Volterra kernels. The complexity of the memoryless model, memory polynomial model, and the suggested model are compared. The extended memory polynomial model is represented with a matrix equation, and the Volterra kernels are extracted using least square method. In addition, the structure of digital predistorter and digital signal processing(DSP) algorithm based on the suggested model and indirect learning method are proposed to implement a digital predistortion linearization. To verify the suggested model, the predicted output of the model is compared with the measured output for a 10W GaN HEMT RF PA and 30 W LDMOS RF PA using 2.3 GHz WiBro input signal, and adjacent-channel power ratio(ACPR) performance with the proposed digital predistortion is measured. The proposed model increases model accuracy for the PAs, and improves the linearization performance by reducing ACPR.

Design of Dual Band Wireless LAN Transmitter Using DGS (DGS를 이용한 이중대역 무선 랜 송신부 설계)

  • Kang Sung-Min;Choi Jae-Hong;Koo Kyung-Heon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.4 s.346
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    • pp.75-80
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    • 2006
  • This paper has proposed a novel dual band transmitter module which can be operating either as an amplifier or as a frequency multiplier according to the input frequency. A conventional dual band transmitter consists of separate amplifiers operating at each frequency band, but the proposed dual band module operates as an amplifier for the IEEE 802.11b/g signal, and as a frequency doubler for the IEEE 802.11a signal according to input frequency and bias voltage. In this paper, we have obtained sharp stop band characteristics by using microstrip DGS(Defected Ground Structure) to suppress the fundamental frequency of the frequency doubler as well as the second harmonic of the amplifier. From measurement result, second harmonic suppression is below -59dBc in the amplifier mode, and fundamental suppression is below -35dBc in the frequency doubler mode. And the designed module has 17.8dBm output P1dB at 2.4GHz and 10.1dBm power for 5.8GHz output, and the output power in the two modes are 0.8dB and 2.8dB larger than the module with ${\lambda}g/4$ reflector, respectively.

Ho3+-Doped Amorphous Dielectrics:Emission and Excitation Spectra of the 1.6 μm Fluorescence (Ho3+ 첨가 비정질 유전체 : 1.6μm 헝광의 방출 및 여기 스펙트럼)

  • 최용규
    • Journal of the Korean Ceramic Society
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    • v.41 no.8
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    • pp.618-622
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    • 2004
  • Excitation spectra of the 1.6 rm emission originating from $Ho^{3+}$$^{5}$ I$_{5}$ \longrightarrow$^{5}$ I$_{7}$ transition in fluoride, sulfide, and selenide glasses were measured at wavelengths around 900nm where the fluorescing $^{5}$ I$_{5}$ level is located. In specific energy range where the frequency upconversion populating $^{5}$ F$_{1}$ state happens, the excitation efficiency of the 1.6 fm emission was deteriorated in fluoride and sulfide hosts. In selenide however spectral line shapes of the excitation spectrum and the '$^{5}$ I$_{8}$ \longrightarrow$^{5}$ I$_{5}$ absorption spectrum looked seemingly identical to each other. Differences in optical nonlinearity as well as electronic band gap energy of the host glasses used are responsible for the experimental observations. On the other hand, codoping of rare earths such as Tb$^{3+}$, Dy$^{3+}$, Eu$^{3+}$, and Nd$^{3+}$ was effective in decreasint the terminating $^{5}$ I$_{7}$ level lifetime. However, at the same time, some of the codopants increased unnecessary absorption at the 1.6 $\mu$m wavelengths via their ground state absorption. Though the lifetime quenching effect of Eu$^{3+}$ was moderate, it exhibited no additional extrinsic absorption at the 1.6 $\mu$m band.EX>m band.

High Efficiency Active Phased Array Antenna Based on Substrate Integrated Waveguide (기판집적 도파관(SIW)을 기반으로 하는 고효율 능동 위상 배열안테나)

  • Lee, Hai-Young
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.227-247
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    • 2015
  • An X-band $8{\times}16$ dual-polarized active phased array antenna system has been implemented based on the substrate integrated waveguide(SIW) technology having low propagation loss, complete EM shielding, and high power handling characteristics. Compared with the microstrip case, 1 dB less is the measured insertion loss(0.65 dB) of the 16-way SIW power distribution network and doubled(3 dB improved) is the measured radiation efficiency(73 %) of the SIW sub-array($1{\times}16$) antenna element. These significant improvements of the power division loss and the radiation efficiency using the SIW, save more than 30 % of the total power consumption, in the active phased array antenna systems, through substantial reduction of the maximum output power(P1 dB) of the high power amplifiers. Using the X-band $8{\times}16$ dual-polarized active phased array antenna system fabricated by the SIW technology, the main radiation beam has been steered by 0, 5, 9, and 18 degrees in the accuracy of 2 degree maximum deviation by simply generating the theoretical control vectors. Performing thermal cycle and vacuum tests, we have found that the SIW array antenna system be eligible for the space environment qualification. We expect that the high efficiency SIW array antenna system be very effective for high performance radar systems, massive MIMO for 5G mobile systems, and various millimeter-wave systems(60 GHz WPAN, 77 GHz automotive radars, high speed digital transmission systems).

Asymmetric Saturated 3-Stage Doherty Power Amplifier Using Envelope Tracking Technique for Improved Efficiency (효율 향상을 위해 포락선 추적 기술을 이용한 비대칭 포화 3-Stage 도허터 전력 증폭기)

  • Kim, Il-Du;Jee, Seung-Hoon;Moon, Jung-Hwan;Son, Jung-Hwan;Kim, Jung-Joon;Kim, Bum-Man
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.8
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    • pp.813-822
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    • 2009
  • We have investigated operation of a 1:2:2 asymmetric 3-stage Doherty PA(Power Amplifier) and implemented using the Freescale's 4 W, 10 W PEP LDMOSFETS at 1 GHz. By employing the three peak efficiency characteristics, compared to the two peak N-way Doherty PA, the asymmetric 3-stage Doherty can overcome the serious efficiency degradation along the backed-off output power region and maximize the average efficiency for the modulation signal. To maximize the efficiency characteristic, the inverse class F PA has been designed as carrier and peaking amplifiers. Furthermore, to extract the proper load modulation operation, the adaptive gate bias control signal has been applied to the two peaking PAs based on the envelope tracking technique. For the 802.16e Mobile WiMAX(World Interoperability for Microwave Access) signal with 8.5 dB PAPR(Peak to Average Power Ratio), the proposed Doherty PA has shown 55.46 % of high efficiency at an average output power of 36.85 dBm while maintaining the -37.23 dB of excellent RCE(Relative Constellation Error) characteristic. This is the first time demonstration of applying the saturated PA and adaptive gate bias control technique to the asymmetric 3-stage Doherty PA for the highly efficient transmitter of the base-station application.