• ETRI Journal
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• 제35권2호
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권3호
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• pp.168-172
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• 2005

In this paper, we present a new adaptive biasing scheme for CMOS op-amps. The designed circuit has been used in an Operational Transconductance Amplifier (OTA) with ${\pm}1$ V power supply, and it has improved the positive and negative slew rates from 2.92 V/msec to 1242 V/msec and from 1.56 V/msec to 133 V/msec respectively, while maintaining all the small-signal performance parameter values the same as that without adaptive biasing (as expected), however, there was a marginal decrease of the dynamic range. The most useful features of the proposed circuit are that it uses a very low number of components (thus not creating severe area penalty) and requires only 25 nW of extra stand-by power.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 A
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• pp.317-319
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• 2003

This paper describes an adaptive distance relay for double-circuit line protection with mutual impedance and fault resistance. Double-circuit lines have two operating condition; both lines of a double-circuit line are in operation and one line is switched-off and both ends of the line are grounded. For optimal distance protection, the trip region is calculated, which have respect to mutual impedance and fault resistance.

• 반도체디스플레이기술학회지
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• 제10권1호
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• pp.113-118
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• 2011

This paper proposes computer visual inspection algorithms for PCB defects which are found in a manufacturing process. The proposed method can detect open circuit and short circuit on bare PCB without using any reference images. It performs adaptive threshold processing for the ROI (Region of Interest) of a target image, median filtering to remove noises, and then analyzes connected components of the binary image. In this paper, the connected components of circuit pattern are defined as 6 types. The proposed method classifies the connected components of the target image into 6 types, and determines an unclassified component as a defect of the circuit. The analysis of the original target image detects open circuits, while the analysis of the complement image finds short circuits. The machine vision inspection system is implemented using C language in an embedded Linux system for a high-speed real-time image processing. Experiment results show that the proposed algorithms are quite successful.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.1069-1070
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• 2013

• 대한의용생체공학회:학술대회논문집
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• 대한의용생체공학회 1992년도 춘계학술대회
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• pp.79-81
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• 1992

This paper describes the design of an adaptive closed circuit anesthesia controller based on a multiplexed mass spectrometer system. The controller deals with measurement deterioration caused by measurement delay and rise time through a tong catheter as well as long sampling times due to the multiplexed measurements. Measurement data is extrapolated between sampling periods to increase the estimation convergence rate. A multiple-step-ahead predictive control algorithm is used to calculate intermediatc control inputs between sampling intervals. Simulations are used to validate the designed controller.

• 한국전자파학회논문지
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• 제22권11호
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• pp.1047-1053
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• 2011

본 논문에서는 근거리에서 효율 향상을 위해 적응 주파수 제어 회로를 갖는 HF-대역 무선 전력 전송 시스템을 제안하였다. 일반적으로 무선 전력 전송 시스템은 공진기 간의 이격 거리가 가까워짐에 따라 결합 계수가 변하게 되며, 이는 반사 임피던스에 의한 임피던스 부정합을 발생시킨다. 본 연구에서 제안한 방식은 전압제어 발진기의 공진 주파수를 이격 거리에 따라 자동으로 가변함으로써 공진기 간의 거리가 가까워 임피던스 부정합이 큰 경우에도 전송 효율의 저하를 막을 수 있다. 적응 주파수 제어 회로는 방향성 결합기, 검파기 및 루프 필터로 구성된다. 본 논문에서 제안한 방법의 유용성을 입증하기 위하여 HF-대역에서 동작하는 30${\times}$30 $cm^2$ 크기의 루프 안테나를 갖는 무선 전력 전송 시스템을 설계하여 측정한 결과 근거리에서 효율이 개선됨을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.563-569
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• 2015

For some low-frequency applications such as power-related circuits, NEM relays have been known to show better performance than MOSFETs. For example, in a step-down charge pump circuit, the NEM relays showed much smaller layout area and better energy efficiency than MOSFETs. However, severe process variations of NEM relays hinder them from being widely used in various low-frequency applications. To mitigate the process-variation problems of NEM relays, in this paper, a new NEM-relay charge pump circuit with the self-adjustment is proposed. By self-adjusting a pulse amplitude voltage according to process variations, the power consumption can be saved by 4.6%, compared to the conventional scheme without the self-adjustment. This power saving can also be helpful in improving the power efficiency of the proposed scheme. From the circuit simulation of NEM-relay charge pump circuit, the efficiency of the proposed scheme is improved better by 4.1% than the conventional.

• 대한전자공학회논문지TC
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• 제44권1호
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• pp.32-37
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• 2007

고효율과 고선형성을 갖는 DMB CMOS 전력증폭기가 제안되어 있다. 이 논문에서는 0.13-um 표준 CMOS 공정이 적용되어졌고 제안된 전력증폭기의 모든 구성 소자는 출력 정합 회로망과 적응형 바이어스 조절 회로를 포함하여 하나의 칩속에 완전히 집적되어졌다. 효율과 선형성을 동시에 개선시키기 위하여 적응형 바이어스 조절 회로가 드레인 노드에 위치한 2차 고조파 종단 회로와 함께 적용되어졌다. 전력증폭기는 각각 16.64 dBm의 $P_{1dB}$, 38.31 %의 효율 (PAE), 그리고 24.64 dB의 출력 이득을 보였다. 3차 혼변조왜곡 (IMD3)과 5차 혼변조왜곡 (IMD5)은 각각 -24.122 dBc, -37.156 dBc 이다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권2호
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• pp.155-167
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• 2015

An adaptive equalization scheme based on all-digital jitter measurement is proposed for a continuous time linear equalizer (CTLE) preceding a clock and data recovery (CDR) in a receiver circuit for high-speed serial interface. The optimum equalization coefficient of CTLE is determined during the initial training period based on the measured jitter. The proposed circuit finds automatically the optimum equalization coefficient for CTLE with 20", 30", 40" FR4 channel at the data rate of 5 Gbps. The chip area of the equalizer including the adaptive controller is 0.14 mm2 in a $0.13{\mu}m$ process. The equalizer consumes 12 mW at 1.2 V supply during the normal operation. The adaptive equalizer has been applied to a USB3.0 receiver.