• ETRI Journal
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• v.26 no.5
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• pp.486-492
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• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• Journal of Power Electronics
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• v.10 no.4
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• pp.412-418
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• 2010

This paper proposes a new algorithm to generate a reference signal for an active power filter using a sliding-window FFT operation to improve the steady-state performance of the active power filter. In the proposed algorithm the sliding-window FFT operation is applied to the load current to generate the reference value for the compensating current. The magnitude and phase-angle for each order of harmonics are respectively averaged for 14 periods. Furthermore, the phase-angle delay for each order of harmonics passing through the controller is corrected in advance to improve the compensation performance. The steady-state and transient performance of the proposed algorithm was verified through computer simulations and experimental work with a hardware prototype. A single-phase active power filter with the proposed algorithm can offer a reduction in THD from 75% to 4% when it is applied to a non-linear load composed of a diode bridge and a RC circuit. The active power filter with the proposed reference generation method shows accurate harmonic compensation performance compared with previously developed methods, in which the THD of source current is higher than 5%.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.80.5-80
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• 2002

1. Introduction II. Circuit Description III. Current-Mode Active RC Filter IV. Simulation Results V. Conclusion

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.11
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• pp.1053-1060
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• 2016

This paper proposes an adaptive equalizer with the digitally controlled active variable capacitor. An equalizing amplifier consists of a main amplifier and a source degeneration RC filter which is implemented using the digitally controlled active variable capacitor for area efficiency and linear loss compensation. The active capacitor changes its capacitance by the amplifier gain control, which is based on miller effect. In the simulated results, the proposed equalizer compensates the high frequency loss and extends the data eye width from 0.31 UI to 0.64 UI.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.4
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• pp.148-153
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• 2003

In this paper, the low voltage 3V Sigma-Delta Digital Analog Converter(DAC) is designed for using in the transmitter of ADSL analog front-end. We have developed the CMOS DAC according to ANSI T1.413-2(DMT) standard specifications of the chip. The designed 4th-order DAC is composed of three block which are 1-bit DAC, 1st-order Switched-Capacitor filter and analog active 2nd-order Resistor-Capacitor(RC) filter. The HSPICE simulation of the designed DAC showing 65db SNR, is connected with 1.1MHz continuous lowpass filter. And also, we have performed the circuits verification and layout verification(ERC, DRC, LVS) followed by fabrication using TSMC 2-poly 5-metal p-substrate CMOS $0.35{\mu}m$ processing parameter. Finally, the chip testing has been performed and presented in the results.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.1972-1974
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• 2004

This paper describes the high pass filter with notch charecteristics. The proposed circuits configuration consists of two uniformly distributed RC line (herein after is called URC) and two gain amplifiers ($K_1$ and $K_2$). With the appropriate $K_1$ and $K_2$ , the circuit has a steeper slope of magnitude response at pass band steeper than using a single gain amplifier.

• Journal of the Korean Institute of Telematics and Electronics
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• v.8 no.5
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• pp.20-26
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• 1971

A function relationship between the envlope rise time and Q v91ue of band pass filter is studied by using the time response to the step and sinusodal inputs. It is discovered that the above relationship is linear in the very low frequency band. The filter was constructed by the Analog computer so as to do the function of 2nd order RC active band pass.

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.2
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• pp.14-21
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• 1981

This paper describes a method for realizing RC active filters, by the use of the CGIC's In realizing the CGIC circuit, every element in the circuit is selected so as to minimize the effect of the non -ideal characteristic of operational amplifers, and an extra element is added to the, CGIC circuit to compensate the parasitic capacitances of the circuit. The CGIC s are utilized in the design of active filters using ladder embedding technique. The design procedure is presented in detail and the application is illustrated by the design of a band-pass filter of high order.

• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.77-84
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• 1998

The continuous time signal system by development of CMOS technology have been receiving consideration attention. In this paper, Low pass filter using CMOS floating resistor have been designed with cut off frequency for speech signal processing. Especially a new floating resistor consisting entirely of CMOS devices in saturation has been developed. Linearity within $\pm$0.04% is achieved through nonlineartiy via current mirrors over an applied range of $\pm$1V. The frequency response exceeds 10MHz, and the resistors are expected to be useful in implementing integrated circuit active RC filters. The low pass filter designed using this method has simpler structure than switched capacitor filter. So reduce the chip area. The characteristics of the designed low pass filter using this method are simulated by pspice program.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.80.3-80
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• 2002

$\textbullet$ Janchitrapongvej Kanok(KMITL), $\textbullet$ Tangtisanon Prakit( KMITL), $\textbullet$ Janin Chainarong(KMITL), $\textbullet$ Panyanouvong Nouanchanh(KMITL), $\textbullet$ Saetia Sorapong(KMITL)