• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.83-90
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• 1998

The effects of dopant activation anneal on GOI (Gate Oxide Integrity) of MOS capacitor with amorphous silicon gate electrode were investigated. It was found that the amorphous silicon gate electrode was crystallized and the dopant atoms were sufficiently activated by activation anneal. The mechanical stress of gate electrode that reveals large compressive stress in amorphous state, was released with increase of anneal temperature from $700^{\circ}C$ to 90$0^{\circ}C$. The resistivity of gate electrode polycrystalline silicon film is decreased by the increase of anneal temperature. The reliability of thin gate oxide and interface properties between oxide and silicon substrate greatly depends on the activation anneal temperature. The charge trapping characteristics as well as oxide reliability are improved by the anneal of 90$0^{\circ}C$ compare to that of $700^{\circ}C$ or 80$0^{\circ}C$. Especially, the lifetimes of the thin gate oxide estimated by TDDB method is 3$\times$10$^{10}$ for the case of $700^{\circ}C$ anneal, is significantly increased to 2$\times$10$^{12}$ for the case of 90$0^{\circ}C$ anneal. Finally, the interface trap density is reduced with relaxation of mechanical stress of gate electrode.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.539-542
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• 2001

In SiC semiconductor device processing, it needs high temperature anneal for activation of ion implanted dopants. The macrosteps, 7~8nm in height, are formed on the surface of SiC substrates during activation anneal. We have investigated the effect of thermally-grown SiO$_2$layer on the suppression of macrostep formation during high temperature anneal. The cap oxide layer was found to be efficient for suppression of macrostep formation even though the annealing temperature is as high as the melting point of SiO$_2$. The thin cap oxide layer (10nm) was evaporated during anneal then the macrosteps were formed on SiC substrate. On the other hand the thicker cap oxide layer (50nm) remains until the anneal process ends. In that case, the surface was smoother and the macrosteps were rarely formed. The thermally-grown oxide layer is found to be a good material for the suppression of macrostep formation because of its feasibility of growing and processing. Moreover, we can choose a proper oxide thickness considering the evaporate rate of SiO$_2$at the given temperature.

• Transactions on Electrical and Electronic Materials
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• v.1 no.4
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• pp.1-6
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• 2000

The mechanical strength of silicon carbide dose nor permit the use of diffusion as a means to achieve selective doping as required by most electronic devices. While epitaxial layers may be doped during growth, ion implantation is needed to define such regions as drain and source wells, junction isolation regions, and so on. Ion activation without an annealing cap results in serious crystal damage as these activation processes must be carried out at temperatures on the order of 1600$^{\circ}C$. Ion implanted silicon carbide that is annealed in either a vacuum or argon environment usually results in a surface morphology that is highly irregular due to the out diffusion of Si atoms. We have developed and report a successful process of using silicon overpressure, provided by silane in a CAD reactor during the anneal, to prevent the destruction of the silicon carbide surface, This process has proved to be robust and has resulted in ion activation at a annealing temperature of 1600$^{\circ}C$ without degradation of the crystal surface as determined by AFM and RBS. In addition XPS was used to look at the surface and near surface chemical states for annealing temperatures of up to 1700$^{\circ}C$. The surface and near surface regions to approximately 6 nm in depth was observed to contain no free silicon or other impurities thus indicating that the process developed results in an atomically clean SiC surface and near surface region within the detection limits of the instrument(${\pm}$1 at %).

• Advances in nano research
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• v.2 no.4
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• pp.179-186
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• 2014

Indium-nitrogen co-doped zinc oxide thin films (INZO) were prepared on glass substrates in the atmosphere by ultrasonic spray pyrolysis. The aqueous solution of zinc acetate, ammonium acetate and different indium sources: indium (III) chloride and indium (III) nitrate were used as the precursors. After film deposition, different anneal temperature treatment as 350, 450, $550^{\circ}C$ were applied. Electrical properties as concentration and mobility were characterized by Hall measurement. The surface morphology and crystalline quality were characterized by SEM and XRD. With the activation energy analysis for both films, the concentration variation of the films at different heat treatment temperature was realized. Donors correspond to zinc related states dominate the conduction mechanism for these INZO films after $550^{\circ}C$ high temperature heat treatment process.

• Transactions on Electrical and Electronic Materials
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• v.1 no.2
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.37-42
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• 2004

Shallow $p^{＋}$-n junctions were formed by preamorphization, low-energy ion implantation and dual-step annealing processes. Germanium ions were implanted into silicon substrates for preamorphization. The dopant implantation was performed into the preamorphized and non-preamorphized substrates using B $F_2$2 ions. Rapid thermal anneal (RTA) and furnace anneal (FA) were employed for dopant activation and damage removal. Samples were annealed by one of the following four methods; RTA(75$0^{\circ}C$/10s)＋Ft FA＋RTA(75$0^{\circ}C$/10s), RTA(100$0^{\circ}C$/10s)＋FA, FA＋The Ge Preamorphized sample exhibited a shallower junction depth than the non-preamorphized sample. When the employed RTA temperature was 100$0^{\circ}C$, FA＋RTA annealing sequence exhibited better junction characteristics than RTA＋FA thermal cycle from the viewpoint of junction depth, sheet resistance, $R_{s}$$.$ $x_{j}$, and leakage current.t.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1630-1632
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• 1997

We have investigated activation phenomena of implanted ions on silicon wafers using microwave(2.45GHz). It is found that the higher concentration of impurities makes the better activation effects by microwave annealing. We have exposed poly-Si TFTs by microwave in order to anneal and improved the device performance. Microwave activates source/drain ions and lowers the contact resistance so that the current of the poly-Si TFTs increases. In addition, the leakage current of hydrogen passivated poly-Si TFTs is decreased after microwave annealing, due to the diffusion of hydrogen ions and curing the defects in the poly-Si active channel.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.5
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• pp.50-55
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• 1983

A comprehensive study of the electrical properties of low-dose Si implants in Cr-doped GaAs substrates has been made using the Hall-effect/sheet-resistivity measurement technique for various ion doses and annealing temperatures. The samples were implanted at room temperature and annealed with silicon nitride encapsulants in a hydrogen atmosphere for 15 minutes. H-type layers were produced at all dose levels investigated, and the optimum annealing temperature was 850$^{\circ}C$ for all doses. The highest electrical activation efficiency was 89% for Cr-doped GaAs substrates. Depth profiles of carrier concentrations and mo-bilities are highly dependent upon ion dose and annealing temperature. Significant im-plantation damage still remains after an 800$^{\circ}C$ anneal, and a 900$^{\circ}C$ anneal produces signi-ficant outdiffusion as well as indiffusion of the implanted Si ions.

• Korean Journal of Materials Research
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• v.9 no.3
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• pp.327-332
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• 1999

The recovery activation energy, the order of reaction and the recovery rate constant were detemined by isochronal and isothermal annealing treatment to investigate the recovery behaviors of neutron irradiated Mn-Mo-Ni low alloy steels$(fluence: 2.3\times10^{19}ncm^{-2}, 553K, E\geq1.0 MeV)$. Vickers microhardness tests were conducted to trace the recovery behavior after heat treatments. The results were analyzed in terms of recovery stages, behavior of responsible defects and recovery kinetics. It was shown that recovery occurred through two annealing stages(stage I : 703-753K, stage n : 813-873K) with re$\infty$very activation energies of 2.5 eV and 2.93 eV for each stage I and n, respectively. From the comparison of unirradiated and irradiated isochronal anneal curves, a radiation anneal hardening(RAH) peak was identified at around 813K. Most of recovery have occurred during about 120 min irrespective of isothermal annealing temperatures of 743K and 833K. Recovery rate constants were determined to be $3.4\times10^{-4}min^{-1} and 7.1\times10^{-4}min^{-1}$ for stage I and II, respectively. The order of reaction was about 2 for both recovery stages. Comparing the obtained data with those of previously reported results on neutron irradiated Mn- Mo- Ni steels, the thermal recovery be­havior of the present material seems to occur by the dissociation of point defect clusters formed during irradiation, and by the recombination process of self-interstitials and vacancies from dissociated vacancy clusters.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.109-109
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• 2010

$Er^{3+}$ ion shows a stable and efficient luminescence at 1.54mm due to its $^4I_{13/2}\;{\rightarrow}\;^4I_{15/2}$ intra-4f transition. As this corresponds to the low-loss window of silica-based optical fibers, Er-based light sources have become a mainstay of the long-distance telecom. In most telecom applications, $Er^{3+}$ ions are excited via resonant optical pumping. However, if nanocluster-Si (nc-Si) are co-doped with $Er^{3+}$, $Er^{3+}$ can be excited via energy transfer from excited electrical carriers in the nc-Si as well. This combines the broad, strong absorption band of nc-Si with narrow, stable emission spectra of $Er^{3+}$ to allow top-pumping with off-resonant, low-cost broadband light sources as well as electrical pumping. A widely used method to achieve nc-Si sensitization of $Er^{3+}$ is high-temperature annealing of Er-doped, non-stoichiometric amorphous thin film with excess Si (e.g.,silicon-rich silicon oxide(SRSO)) to precipitate nc-Si and optically activate $Er^{3+}$ at the same time. Unfortunately, such precipitation and growth of nc-Si into Er-doped oxide matrix can lead to $Er^{3+}$ clustering away from nc-Si at anneal temperatures much lower than ${\sim}1000^{\circ}C$ that is necessary for full optical activation of $Er^{3+}$ in $SiO_2$. Recently, silicon-rich silicon nitride (SRSN) was reported to be a promising alternative to SRSO that can overcome this problem of Er clustering. But as nc-Si formation and optical activation $Er^{3+}$ remain linked in Er-doped SRSN, it is not clear which mechanism is responsible for the observed improvement. In this paper, we report on investigating the effect of separating the nc-Si formation and $Er^{3+}$ activation by using hetero-multilayers that consist of nm-thin SRSO or SRSN sensitizing layers with Er-doped $SiO_2$ or $Si_3N_4$ luminescing layers.