• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.20-28
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• 2003

In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.116-116
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• 2011

오늘날 표시장치는 경량, 고밀도, 고해상도 대면적화의 요구에 의해 TFT-LCD의 발전이 이루어졌다. TFT에는 반도체 재료로서, Poly-Si을 사용하는 Poly-Si TFT와 a-Si:H를 이용하는 a-Si;H TFT가 있는데 a-Si는 $350^{\circ}C$ 이하의 저온으로 제작이 가능하여 많이 사용되고 있다. 이러한 방향에 맞추어 bottom gate 구조의 a-Si TFT 실험을 진행하였다. P-type silicon substrate ($0.01{\sim}0.02{\Omega}-cm$)에 gate insulator 층인 SiNx (SiH4 : NH3 = 6:60)를 200nm 증착하였다. 그리고 그 위에 active layer 층인 a-Si (SiH4 : H2 : He =2.6 : 10 : 100)을 다른 RF power를 적용하여 100 nm 증착하였다. 그 위에 Source와 Drain 층은 Al 120 nm를 evaporator로 증착하였다. active layer, gate insulator 층은 ICP-CVD 장비를 이용하여 증착하였으며, 공정온도는 $300^{\circ}C$ 로 고정하였다. active layer층 증착시 RF power는 100W, 300W, 500W, 600W로 가변하였고, width/length는 100 um/8um로 고정하였다. 증착한 a-Si layer층을 Raman spectroscope, SEM 측정 하였으며, TFT 제작 후, VG-ID, VD-ID 측정을 통해 전기적 특성인 Threshold voltage, Subthreshold swing, Field effect mobility, ON/OFF current ratio를 비교해 보았다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.24-29
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• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• Electrical & Electronic Materials
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• v.9 no.1
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• ETRI Journal
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• v.34 no.4
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• pp.633-636
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• 2012

A dynamic analysis of an amorphous silicon (a-Si) thin film transistor liquid crystal display (TFT-LCD) pixel is presented using new a-Si TFT and liquid crystal (LC) capacitance models for a Simulation Program with Integrated Circuit Emphasis (SPICE) simulator. This dynamic analysis will be useful when predicting the performance of LCDs. The a-Si TFT model is developed to accurately estimate a-Si TFT characteristics of a bias-dependent gate to source and gate to drain capacitance. Moreover, the LC capacitance model is developed using a simplified diode circuit model. It is possible to accurately predict TFT-LCD characteristics such as flicker phenomena when implementing the proposed simulation model.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.7
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• pp.481-485
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• 2003

Amorphous silicon (a-Si:H) based TFT process has been studied at the maximum temperature of 15$0^{\circ}C$ with 25${\mu}{\textrm}{m}$ thick flexible and adhesive tape type polyimide foil substrate, which has benefit on handling a rugged, flexible plastic substrate trough sticking simply it to glass. This paper summarize the process procedure of the TFT on the plastic substrate and shows its electrical characteristics in comparison with glass substrate using primarily the ON/OFF current ratio and the field effect mobility as the quality criterion. The a-SiN:H coating layer played an important role in decreasing surface roughness of plastic substrate, so leakage current of TFT was decreased and mobility was increased. The results show that high quality a-Si:H TFTs can be fabricated on the plastic substrates through coating a rough plastic surface with a-SiN:H.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1633-1635
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• 1997

For AMLCD pixel switching device, poly-Si TFT has the advantage of high field effect mobility over a-Si TFT. However, it also has some disadvantage such as large leakage current and more masking steps. We propose a new Inverse Staggered poly-Si TFT with a-Si offset. We have fabricated the new device and verified high ON/OFF current ratio. The device has lower leakage current level than the conventional Inverse Staggered poly-Si TFT and the same number of masking steps compared with conventional a-Si TFT's.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.314-317
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• 2000

In order to analyze the characteristics of complicated TFT-LCD (Thin Film Transistor-Liquid Crystal Display) circuits, it is indispensible to use simulation programs. In this study, we present a systematic method of extracting the input parameters of poly-Si TFT for Spice simulation. This method is applied to two different types of poly-Si TFTs fabricated in our group with good results. Among the Spice simulators, Pspice has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT model on the Pspice simulator, which would contribute to efficient simulations of poly-Si TFT-LCD pixels and arrays.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.125-126
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• 2007

Polycrystalline silicon thin-film-transistors (Poly-Si TFT's) with a amorphous-$Si_xGe_y$ seed layer have been fabricated to improve the performance of TFT. The dependence of crystal structure and electrical characteristics on the the Ge fractions in $Si_xGe_y$ seed layer were investigated. As a result, the increase of grain size and enhancement of electrical characteristics were obtained from the poly-Si TFT's with amorphous-SixGey seed layer.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.25-35
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• 2001

In order to analyze the electrical characteristics of complicated thin film transistor-liquid crystal display (TFT-LCD) array circuits, it is indispensible to use simulation programs such as PSPICE and AIM-SPICE. In this paper, we present a systematic method of extracting the input parameters of poly-Si TFT for SPICE simulations. This method was applied to two different types of poly-Si TFTs, fabricated by excimer laser annealing and silicide mediated crystallization methods, and yielded good fitting results to experimental data. Among the SPICE simulators, PSPICE has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT device model to the PSPICE simulator, and analyzed easily the electrical characteristics of pixels considering the line RC delay. The results of this work would contribute to efficient simulations of poly-Si TFT-LCD arrays.