• 제목/요약/키워드: Wide voltage range

검색결과 693건 처리시간 0.025초

LED 평판조명의 저온환경에서의 전기광학특성 (Electro-optical Characteristics of LED Flat Light Source in Low Temperature Condition)

  • 한정민;서대식
    • 한국인터넷방송통신학회논문지
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    • 제11권1호
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    • pp.61-65
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    • 2011
  • 최근 액정디스플레이는 TV, Monitor, Note PC를 비롯한 모든 디스플레이영역에서 활발하게 사용되고 있다. 그러나, 액정디스플레이의 배경광원으로 사용하는 평판조명장치(백라이트)에서 주로 사용하는 광원인 CCFL(냉음극방전관)의 경우 수은 가스를 사용하기 때문에 저온 환경에서의 구동특성에 한계를 갖고 있다. 본 연구에서는 이러한 CCFL 광원이 갖고 있는 문제점을 해결하기 위해서, LED 광원을 사용한 백라이트 조명장치를 고안하고, -40도의 극저온환경에서의 동작특성을 CCFL 광원을 사용한 백라이트 조명장치와 비교분석하여, 저온환경에서의 LED 백라이트의 효용성에 대해서 연구하였다.

MRAM용 HSPICE 마크로 모델과 midpoint reference 발생 회로에 관한 연구 (HSPICE Macro-Model and Midpoint-Reference Generation Circuits for MRAM)

  • 이승연;이승준;신형순
    • 대한전자공학회논문지SD
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    • 제41권8호
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    • pp.105-113
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    • 2004
  • MRAM (Magneto-resistive Random Access Memory)은 자성체의 스핀 방향을 정보원으로 하는 비휘발성 메모리로 magneto-resistance 물질을 정보 저장 소자로 사용한다. 본 논문에서는 MRAM 시뮬레이션시 MTJ (Magnetic Tunneling Junction)의 hysteretic 특성, asteroid 특성, R-V 특성을 HSPICE에서 재현할 수 있는 새로운 macro-model을 제안하고 HSPICE에 적용하여 그 정확도를 검증하였다. 또한 종래의 reference cell 회로에 비하여 정확한 중간 저항 값을 유지하는 새로운 reference cell 회로를 제안하고 이를 본 논문에서 제안한 macro-model을 이용하여 검증하였다.

개선된 자동 주파수 보정회로를 이용한 광대역 클록 발생기 설계 (A Wideband Clock Generator Design using Improved Automatic Frequency Calibration Circuit)

  • 정상훈;유남희;조성익
    • 전기학회논문지
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    • 제60권2호
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    • pp.451-454
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    • 2011
  • In this paper, a wideband clock generator using novel Automatic frequency calibration(AFC) scheme is proposed. Wideband clock generator using AFC has the advantage of small VCO gain and wide frequency band. The conventional AFC compares whether the feedback frequency is faster or slower then the reference frequency. However, the proposed AFC can detect frequency difference between reference frequency with feedback frequency. So it can be reduced an operation time than conventional methods AFC. Conventional AFC goes to the initial code if the frequency step changed. This AFC, on the other hand, can a prior state code so it can approach a fast operation. In simulation results, the proposed clock generator is designed for DisplayPort using the CMOS ring-VCO. The VCO tuning range is 350MHz, and a VCO frequency is 270MHz. The lock time of clock generator is less then 3us at input reference frequency, 67.5MHz. The phase noise is -109dBC/Hz at 1MHz offset from the center frequency. and power consumption is 10.1mW at 1.8V supply and layout area is $0.384mm^2$.

Reduced Rating T-Connected Autotransformer Based Thirty-Pulse AC-DC Converter for Vector Controlled Induction Motor Drives

  • Singh Bhim;Bhuvaneswari G.;Garg Vipin
    • Journal of Power Electronics
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    • 제6권3호
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    • pp.214-225
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    • 2006
  • The design and performance analysis of a reduced rating autotransformer based thirty-pulse AC-DC converter is carried out for feeding a vector controlled induction motor drive (VCIMD). The configuration of the proposed autotransformer consists of only two single phase transformers, with their windings connected in a T-shape, resulting in simplicity in design, manufacturing and in a reduction in magnetics rating. The design procedure of the autotransformer along with the newly designed interphase transformer is presented. The proposed configuration has flexibility in varying the transformer output voltage ratios as required. The design of the autotransformer can be modified for retrofit applications, where presently a 6-pulse diode bridge rectifier is used. The proposed thirty-pulse AC-DC converter is capable of suppressing less than $29^{th}$ harmonics in the supply current. The power factor is also improved to near unity in the wide operating range of the drive. A comparison of different power quality indices at AC mains and DC bus is demonstrated in a conventional 6-pulse AC-DC converter and the proposed AC-DC converter feeding a VCIMD. A laboratory prototype of the proposed autotransformer based 30-pulse AC-DC converter was developed with test results validating the proposed design and system.

Sliding Mode Control for Current Distribution Control in Paralleled Positive Output Elementary Super Lift Luo Converters

  • Kumar, Kuppan Ramash;Jeevananthan, Seenithangam
    • Journal of Power Electronics
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    • 제11권5호
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    • pp.639-654
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    • 2011
  • This paper presents a Current Distribution Control design for Paralleled Positive Output Elementary Super Lift Luo Converters (PPOESLLCs) operated in Continuous Conduction Mode using a Sliding Mode Controller (SMC). Manipulating the higher current requirement of the load through the paralleling of POESLLCs, results in a current inequality. This is mainly due to dissimilarities in the power semiconductor switches and circuit components used in POESLLCs, which may lead to converter failures. In order to balance the proper load current sharing and the load voltage regulation of PPOESLLCs, a SMC is developed. The SMC is designed for the inherently variable-structured of POESLLCs by using the state-space average based model. The static and dynamic performance of the developed controller with PPOESLLCs is validated for its robustness to perform over a wide range of operating conditions through both a laboratory prototype and MatLab/Simulink models, which are compared with a Proportional-Integral (PI) controller. Theoretical analysis, simulation and experimental results are presented to demonstrate the feasibility of the developed SMC along with the complete design procedure.

넓은 출력 전압제어 특성을 갖는 단일전력단 3레벨 AC/DC 컨버터 (Single Stage Three Level AC/DC Converter with Wide Output Voltage Control Range)

  • 마리우스;허예창;이지철;이운경;김은수;국윤상
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2017년도 전력전자학술대회
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    • pp.373-374
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    • 2017
  • 최근 개발 및 출시되고 있는 전기자동차(EV) 충전시스템은 3상 AC전원을 입력받아 입력역률개선과 고효율 AC/DC변환을 위한 Interleaved PFC컨버터, Bridgeless PFC컨버터, 3-Level 비엔나정류기(VIENNEA Rectifier) 등의 Topology가 사용되고 있으며, 변환된 DC전압을 입력받아 배터리를 충전하기 위한 절연된 고주파 DC/DC컨버터로 LLC 공진컨버터, 3레벨 컨버터 등이 사용되어 사이즈저감 및 경량화를 꾀하고 있다. 본 논문은 기존 입력역률 개선을 위한 PFC 컨버터와 배터리 충전을 위한 절연형 DC/DC 컨버터 2단으로 구성되어진 충전시스템 대신에 사이즈저감 및 효율개선 그리고 넓은 범위의 출력전압제어(200Vdc~430Vdc)에 대응 할 수 있도록 '단일전력단 3레벨 하이브리드 AC/DC 컨버터'를 제안하였고, 2kW 시제품을 제작하여 실험을 통해 적용 가능성을 입증하였다.

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광통신 모듈용 155.52 MHz 클럭복원 리시버의 구현 (Implementation of the 155.52 MHz Clock Recovery Receiver for the Fiber Optic Modules)

  • 이길재;채상훈
    • 한국통신학회논문지
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    • 제26권12C호
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    • pp.249-254
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    • 2001
  • STM-1 체계의 광통신 수신부 광모듈에 내장하기 위한 리시버 ASIC을 0.65 $\mu\textrm{m}$ 실리콘 CMOS 기술을 이용하여 설계 제작하였다. 제작된 ASIC은 155.52 Mbps 데이터신호 재정형을 위한 제한 증폭기와 155.52 MHz 시스템 클럭을 추출하기 위한 클럭 복원 회로를 주축으로 구성되어 있다. 또한 이 리시버는 전원이 켜지는 초기 동작 상태에서나 동작 도중 데이터신호가 입력되지 않더라도 155.52 MHz 부근의 클럭 주파수를 유지하여 항상 안정된 동작을 할 수 있게 하기 위한 수렴 보조 회로 및 LOS 감지 회로도 내장하고 있다. 측정 결과 설계된 리시버는 5 mV-1 V의 넓은 입력 전압에 걸쳐 데이터 재정형이 이루어지며, 항상 안정된 클럭을 복원하고 있음을 알 수 있었다.

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부분방전검출 신뢰도 향상을 위한 UHF 센서개선 및 성능검증 (Performance Verification and Improvement of UHF Sensor for the Increasement of the Partial Discharge Detection Reliability)

  • 김원규;김민수;백영식
    • 전기학회논문지
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    • 제63권10호
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    • pp.1461-1466
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    • 2014
  • GIS(Gas Insulated Switchgear) is important power apparatus which have strong dielectric strength, supply electric power and is a part of the power system. Most substation type is configured as GIS. Recently, because of continuous increasement of GIS demand resulted from high quality & big capacity of electric power, the necessity of the preventive & diagnosis system is being expanded gradually. GIS partial discharge occurred on the UHF band is detected effectively by the method to IEC 60270 that recommend to be able to detect the apparent minimum discharge, 5 pC. Additionally, the UHF sensor should be installed to detect PD signal if Partial discharge signal, 5 pC occur in every part of GIS. Currently PD diagnosis system applying UHF sensor for GIS with various voltage level like 154 kV, 345 kV, 765 kV have been operated. And it is necessary to measure and analyze insulation breakdown phenomenon of inside GIS exactly. In this paper, we proposed Fat-dipole patch UHF sensor that is developed and more sensitive, excellent wide-range characteristic than the exising UHF sensor. And we performed KERI (Korea Electrotechnology Research Institute) reference test, which showed the excellent result for the all tests.

A Novel Dual-Input Boost-Buck Converter with Coupled Inductors for Distributed Thermoelectric Generation Systems

  • Zhang, Junjun;Wu, Hongfei;Sun, Kai;Xing, Yan;Cao, Feng
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.899-909
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    • 2015
  • A dual-input boost-buck converter with coupled inductors (DIBBC-CI) is proposed as a thermoelectric generator (TEG) power conditioner with a wide input voltage range. The DIBBC-CI is built by cascading two boost cells and a buck cell with shared inverse coupled filter inductors. Low current ripple on both sides of the TEG and the battery are achieved. Reduced size and power losses of the filter inductors are benefited from the DC magnetic flux cancellation in the inductor core, leading to high efficiency and high power density. The operational principle, impact of coupled inductors, and design considerations for the proposed converter are analyzed in detail. Distributed maximum power point tracking, battery charging, and output control are implemented using a competitive logic to ensure seamless switching among operational modes. Both the simulation and experimental results verify the feasibility of the proposed topology and control.

Single-Phase Bridgeless Zeta PFC Converter with Reduced Conduction Losses

  • Khan, Shakil Ahamed;Rahim, Nasrudin Abd.;Bakar, Ab Halim Abu;Kwang, Tan Chia
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.356-365
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    • 2015
  • This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.