• 제목/요약/키워드: Wide Band-gap

검색결과 245건 처리시간 0.037초

An Active Voltage Doubling Rectifier with Unbalanced-Biased Comparators for Piezoelectric Energy Harvesters

  • Liu, Lianxi;Mu, Junchao;Yuan, Wenzhi;Tu, Wei;Zhu, Zhangming;Yang, Yintang
    • Journal of Power Electronics
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    • 제16권3호
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    • pp.1226-1235
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    • 2016
  • For wearable health monitoring systems, a fundamental problem is the limited space for storing energy, which can be translated into a short operational life. In this paper, a highly efficient active voltage doubling rectifier with a wide input range for micro-piezoelectric energy harvesting systems is proposed. To obtain a higher output voltage, the Dickson charge pump topology is chosen in this design. By replacing the passive diodes with unbalanced-biased comparator-controlled active counterparts, the proposed rectifier minimizes the voltage losses along the conduction path and solves the reverse leakage problem caused by conventional comparator-controlled active diodes. To improve the rectifier input voltage sensitivity and decrease the minimum operational input voltage, two low power common-gate comparators are introduced in the proposed design. To keep the comparator from oscillating, a positive feedback loop formed by the capacitor C is added to it. Based on the SMIC 0.18-μm standard CMOS process, the proposed rectifier is simulated and implemented. The area of the whole chip is 0.91×0.97 mm2, while the rectifier core occupies only 13% of this area. The measured results show that the proposed rectifier can operate properly with input amplitudes ranging from 0.2 to 1.0V and with frequencies ranging from 20 to 3000 Hz. The proposed rectifier can achieve a 92.5% power conversion efficiency (PCE) with input amplitudes equal to 0.6 V at 200 Hz. The voltage conversion efficiency (VCE) is around 93% for input amplitudes greater than 0.3 V and load resistances larger than 20kΩ.

Rogowski Coil 기반의 전류 센싱 회로를 적용한 SiC MOSFET 단락 보호 회로 설계 (Short-circuit Protection Circuit Design for SiC MOSFET Using Current Sensing Circuit Based on Rogowski Coil)

  • 이주아;변종은;안상준;손원진;이병국
    • 전력전자학회논문지
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    • 제26권3호
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    • pp.214-221
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    • 2021
  • SiC MOSFETs require a faster and more reliable short-circuit protection circuit than conventional methods due to narrow short-circuit withstand times. Therefore, this research proposes a short-circuit protection circuit using a current-sensing circuit based on Rogowski coil. The method of designing the current-sensing circuit, which is a component of the proposed circuit, is presented first. The integrator and input/output filter that compose the current-sensing circuit are designed to have a wide bandwidth for accurately measuring short-circuit currents with high di/dt. The precision of the designed sensing circuit is verified on a double pulse test (DPT). In addition, the sensing accuracy according to the bandwidth of the filters and the number of turns of the Rogowski coil is analyzed. Next, the entire short-circuit protection circuit with the current-sensing circuit is designed in consideration of the fast short-circuit shutdown time. To verify the performance of this circuit, a short-circuit test is conducted for two cases of short-circuit conditions that can occur in the half-bridge structure. Finally, the short-circuit shutdown time is measured to confirm the suitability of the proposed protection circuit for the SiC MOSFET short-circuit protection.

Insulated Metal Substrate를 사용한 고출력 전력 반도체 방열설계 (Thermal Design of High Power Semiconductor Using Insulated Metal Substrate)

  • 정봉민;오애선;김선애;이가원;배현철
    • 마이크로전자및패키징학회지
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    • 제30권1호
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    • pp.63-70
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    • 2023
  • 오늘날 심각한 환경 오염과 에너지의 중요성으로 전력 반도체의 중요도가 지속적으로 높아지고 있다. 특히 wide band gap(WBG)소자 중 하나인 SiC-MOSFET은 우수한 고전압 특성을 가지고 있어 그 중요도가 매우 높다. 하지만 SiC-MOSFET의 전기적 특성이 열에 민감하기 때문에 패키지를 통한 열 관리가 필요하다. 본 논문에서는 기존 전력 반도체에서 사용하는 direct bonded copper(DBC) 기판 방식이 아닌 insulated metal substrate(IMS) 방식을 제안한다. IMS는 DBC에 비해 공정이 쉬우며 coefficient of thermal expansion (CTE)가 높아서 비용과 신뢰성 측면에서 우수하다. IMS의 절연층인 dielectric film의 열전도도가 낮은 문제가 있지만 매우 얇은 두께로 공정이 가능하기 때문에 낮은 열 전도도를 충분히 극복할 수 있다. 이를 확인하기 위해서 이번 연구에서는 electric-thermal co-simulation을 수행하였으며 검증을 위해 DBC 기판과 IMS를 제작하여 실험하였다.

Interfacial reaction and Fermi level movements of p-type GaN covered by thin Pd/Ni and Ni/Pd films

  • 김종호;김종훈;강희재;김차연;임철준;서재명
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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    • pp.115-115
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    • 1999
  • GaN는 직접천이형 wide band gap(3.4eV) 반도체로서 청색/자외선 발광소자 및 고출력 전자장비등에의 응용성 때문에 폭넓게 연구되고 있다. 이러한 넓은 분야의 응용을 위해서는 열 적으로 안정된 Ohmic contact을 반드시 실현되어야 한다. n-type GaN의 경우에는 GaN계면에서의 N vacancy가 n-type carrier로 작용하기 때문에 Ti, Al, 같은 금속을 접합하여 nitride를 형성함에 의해서 낮은 접촉저항을 갖는 Ohmic contact을 하기가 쉽다. 그러나 p-type의 경우에는 일 함수가 크고 n-type와 다르게 nitride가 형성되지 않는 금속이 Ohmic contact을 할 가능성이 많다. 시료는 HF(HF:H2O=1:1)에서 10분간 초음파 세척을 한 후 깨끗한 물에 충분히 헹구었다. 그런 후에 고순도 Ar 가스로 건조시켰다. Pd와 Ni은 열적 증착법(thermal evaporation)을 사용하여 p-GaN에 상온에서 증착하였다. 현 연구에서는 열처리에 의한 Pd의 clustering을 줄이기 위해서 wetting이 좋은 Ni을 Pd 증착 전과 후에 삽입하였으며, monchromatic XPS(x-ray photoelectron spectroscopy) 와 SAM(scanning Auger microscopy)을 사용하여 열처리 전과 40$0^{\circ}C$, 52$0^{\circ}C$ 그리고 695$0^{\circ}C$에서 3분간 열처리 후의 온도에 따른 morphology 변화, 계면반응(interfacial reaction) 및 벤드 휨(band bending)을 비교 연구하였다. Nls core level peak를 사용한 band bending에서 Schottky barrier height는 Pd/Ni bi-layer 접합시 2.1eV를, Ni/Pd bi-layer의 경우에 2.01eV를 얻었으며, 이는 Pd와 Ni의 이상적인 Schottky barrier height 값 2.38eV, 2.35eV와 비교해 볼 때 매우 유사한 값임을 알 수 있다. 시료를 후열처리함에 의해 52$0^{\circ}C$까지는 barrier height는 큰 변화가 없으나, $650^{\circ}C$에서 3분 열처리 후에 0.36eV, 0.28eV 만큼 band가 더 ?을 알 수 있었다. Pd/Ni 및 Ni/Pd 접합시 $650^{\circ}C$까지 후 열 처리 과정에서 계면에서 matallic Ga은 온도에 비례하여 많은 양이 형성되어 표면으로 편석(segregation)되어지나, In-situ SAM을 이용한 depth profile을 통해서 Ni/Pd, Pd/Ni는 증착시 uniform하게 성장함을 알 수 있었으며, 후열처리 함에 의해서 점차적으로 morphology 의 변화가 일어나기 시작함을 볼 수 있었다. 이는 $650^{\circ}C$에서 열처리 한후의 ex-situ AFM을 통해서 재확인 할 수 있었다. 이상의 결과로부터 GaN에 Pd를 접합 시 심한 clustering이 형성되어 Ohoic contact에 문제가 있으나 Pd/Ni 혹은 Ni/Pd bi-layer를 사용함에 의해서 clustering의 크기를 줄일 수 있었다. Clustering의 크기는 Ni/Pd bi-layer의 경우가 작았으며, $650^{\circ}C$ 열처리 후에 barrier height는 Pd/Ni bi-layer의 경우에도 Ni의 영향을 받음을 알 수 있었다.

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RF 마그네트론 스퍼터를 이용하여 제작한 MGZO 박막의 구조적 및 전기적, 광학적 특성에 미치는 스퍼터링 전력의 영향 (Effect of Sputtering Powers on Mg and Ga Co-Doped ZnO Thin Films with Transparent Conducting Characteristics)

  • 김인영;신승욱;김민성;윤재호;허기석;정채환;문종하;이정용;김진혁
    • 한국재료학회지
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    • 제23권3호
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    • pp.155-160
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    • 2013
  • ZnO thin films co-doped with Mg and Ga (MxGyZzO, x + y + z = 1, x = 0.05, y = 0.02 and z = 0.93) were prepared on glass substrates by RF magnetron sputtering with different sputtering powers ranging from 100W to 200W at a substrate temperature of $350^{\circ}C$. The effects of the sputtering power on the structural, morphological, electrical, and optical properties of MGZO thin films were investigated. The X-ray diffraction patterns showed that all the MGZO thin films were grown as a hexagonal wurtzite phase with the preferred orientation on the c-axis without secondary phases such as MgO, $Ga_2O_3$, or $ZnGa_2O_4$. The intensity of the diffraction peak from the (0002) plane of the MGZO thin films was enhanced as the sputtering power increased. The (0002) peak positions of the MGZO thin films was shifted toward, a high diffraction angle as the sputtering power increased. Cross-sectional field emission scanning electron microscopy images of the MGZO thin films showed that all of these films had a columnar structure and their thickness increased with an increase in the sputtering power. MGZO thin film deposited at the sputtering power of 200W showed the best electrical characteristics in terms of the carrier concentration ($4.71{\times}10^{20}cm^{-3}$), charge carrier mobility ($10.2cm^2V^{-1}s^{-1}$) and a minimum resistivity ($1.3{\times}10^{-3}{\Omega}cm$). A UV-visible spectroscopy assessment showed that the MGZO thin films had high transmittance of more than 80 % in the visible region and that the absorption edges of MGZO thin films were very sharp and shifted toward the higher wavelength side, from 270 nm to 340 nm, with an increase in the sputtering power. The band-gap energy of MGZO thin films was widened from 3.74 eV to 3.92 eV with the change in the sputtering power.

Effect of Oxygen and Diborane Gas Ratio on P-type Amorphous Silicon Oxide films and Its Application to Amorphous Silicon Solar Cells

  • Park, Jin-Joo;Kim, Young-Kuk;Lee, Sun-Wha;Lee, Youn-Jung;Yi, Jun-Sin;Hussain, Shahzada Qamar;Balaji, Nagarajan
    • Transactions on Electrical and Electronic Materials
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    • 제13권4호
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    • pp.192-195
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    • 2012
  • We reported diborane ($B_2H_6$) doped wide bandgap hydrogenated amorphous silicon oxide (p-type a-SiOx:H) films prepared by using silane ($SiH_4$) hydrogen ($H_2$) and nitrous oxide ($N_2O$) in a radio frequency (RF) plasma enhanced chemical vapor deposition (PECVD) system. We improved the $E_{opt}$ and conductivity of p-type a-SiOx:H films with various $N_2O$ and $B_2H_6$ ratios and applied those films in regards to the a-Si thin film solar cells. For the single layer p-type a-SiOx:H films, we achieved an optical band gap energy ($E_{opt}$) of 1.91 and 1.99 eV, electrical conductivity of approximately $10^{-7}$ S/cm and activation energy ($E_a$) of 0.57 to 0.52 eV with various $N_2O$ and $B_2H_6$ ratios. We applied those films for the a-Si thin film solar cell and the current-voltage characteristics are as given as: $V_{oc}$ = 853 and 842 mV, $J_{sc}$ = 13.87 and 15.13 $mA/cm^2$. FF = 0.645 and 0.656 and ${\eta}$ = 7.54 and 8.36% with $B_2H_6$ ratios of 0.5 and 1% respectively.

Contact Resistance and Leakage Current of GaN Devices with Annealed Ti/Al/Mo/Au Ohmic Contacts

  • Ha, Min-Woo;Choi, Kangmin;Jo, Yoo Jin;Jin, Hyun Soo;Park, Tae Joo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.179-184
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    • 2016
  • In recent years, the on-resistance, power loss and cell density of Si power devices have not exhibited significant improvements, and performance is approaching the material limits. GaN is considered an attractive material for future high-power applications because of the wide band-gap, large breakdown field, high electron mobility, high switching speed and low on-resistance. Here we report on the Ohmic contact resistance and reverse-bias characteristics of AlGaN/GaN Schottky barrier diodes with and without annealing. Annealing in oxygen at $500^{\circ}C$ resulted in an increase in the breakdown voltage from 641 to 1,172 V for devices with an anode-cathode separation of $20{\mu}m$. However, these annealing conditions also resulted in an increase in the contact resistance of $0.183{\Omega}-mm$, which is attributed to oxidation of the metal contacts. Auger electron spectroscopy revealed diffusion of oxygen and Au into the AlGaN and GaN layers following annealing. The improved reverse-bias characteristics following annealing in oxygen are attributed to passivation of dangling bonds and plasma damage due to interactions between oxygen and GaN/AlGaN. Thermal annealing is therefore useful during the fabrication of high-voltage GaN devices, but the effects on the Ohmic contact resistance should be considered.

Electrical Characteristics of SiO2/4H-SiC Metal-oxide-semiconductor Capacitors with Low-temperature Atomic Layer Deposited SiO2

  • Jo, Yoo Jin;Moon, Jeong Hyun;Seok, Ogyun;Bahng, Wook;Park, Tae Joo;Ha, Min-Woo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권2호
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    • pp.265-270
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    • 2017
  • 4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.

Electrical properties of n-ZnO/p-Si heterojunction photovoltaic devices

  • Kang, Ji Hoon;Lee, Kyoung Su;Kim, Eun Kyu
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.306.1-306.1
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    • 2016
  • ZnO semiconductor material has been widely utilized in various applications in semiconductor device technology owing to its unique electrical and optical features. It is a promising as solar cell material, because of its low cost, n-type conductivity and wide direct band gap. In this work ZnO/Si heterojunctions were fabricated by using pulsed laser deposition. Vacuum chamber was evacuated to a base pressure of approximately $2{\times}10^{-6}Torr$. ZnO thin films were grown on p-Si (100) substrate at oxygen partial pressure from 5mTorr to 40mTorr. Growth temperature of ZnO thin films was set to 773K. A pulsed (10 Hz) Nd:YAG laser operating at a wavelength of 266 nm was used to produce a plasma plume from an ablated a ZnO target, whose density of laser energy was $10J/cm^2$. Thickness of all the thin films of ZnO was about 300nm. The optical property was characterized by photoluminescence and crystallinity of ZnO was analyzed by X-ray diffraction. For fabrication ZnO/Si heterojunction diodes, indium metal and Al grid patterns were deposited on back and front side of the solar cells by using thermal evaporator, respectively. Finally, current-voltage characteristics of the ZnO/Si structure were studied by using Keithly 2600. Under Air Mass 1.5 Global solar simulator with an irradiation intensity of $100mW/cm^2$, the electrical properties of ZnO/Si heterojunction photovoltaic devices were analyzed.

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CIGS 박막태양전지용 Cd free형 ZnS(O, OH) 버퍼층 제조 및 특성평가

  • 김혜진;김재웅;김기림;정덕영;정채환
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.257.1-257.1
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    • 2015
  • Cu(In,Ga)Se2 (CIGS) 박막 태양 전지에서 buffer layer는 CIGS 흡수층과 TCO 사이의 밴드갭 차이에 대한 문제점과 lattice mismatch를 해결하기 위해 필수적이다. 흔히 buffer layer 물질로는 CdS가 가장 많이 사용되고 있으나 Cd의 독성에 관한 문제가 야기되고 있다. 따라서 ZnS(O, OH) buffer layer가 친환경 물질로 기존의 CdS 버퍼 층의 대체 물질로 각광 받고 있으며, 단파장 범위에서 높은 투과율로 인해 wide band gap의 Chalcopyrite 태양 전지에 응용되는 buffer layer로 많은 연구가 이루어지고 있다. 또한 buffer layer를 최적화 하여 carrier lifetime과 양자 효율이 증가시킬 수 있는 특성을 가지고 있다. 이 연구에서는 Cu(In,Ga)Se2 (CIGS) 박막에 화학습식공정 (CBD) 방법을 이용하여 최적화된 ZnS(O, OH)의 증착 조건을 찾고, 고품질의 buffer layer를 제조하기 위한 실험에 초점을 맞췄다. 또한, buffer layer의 막질을 개선하고 균일한 막을 제조하기 위해 processing parameters인 시약의 농도, 제조 시간 및 온도 등의 다양한 변화를 통해 실험을 진행하였다. 그 후 최적화된 ZnS(O, OH) buffer layer의 특성 분석을 위해 X-ray diffraction(XRD), photoluminescence (PL), scanning electron microscope (SEM) and GD-OES을 이용하였고, 이를 통해 제조된 CIGS 박막 태양전지는 light induced current-voltage (LIV) and external quantum efficiency (EQE)를 통해 특성 분석을 실시 하였다. 결과적으로, 제조된 ZnS(O, OH) buffer layer의 $ZnSO4{\cdot}7H2O$의 농도는 0.16 M, Thiourea는 0.5 M, NH4OH는 7.5 M, 그리고 반응 온도는 77.5 oC의 조건 하에 CIGS 기판 위에 균일하고 균열이 없는 ZnS(O, OH) 박막을 제조하였으며 이때 제조된 태양전지의 소자 특성은 Voc = 0.478 V, Jsc = 35.79 mA/cm2, FF = 47.77%, ${\eta}=8,18 %$이다.

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