• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.605-608
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• 2002

This paper proposes a real-time wall charge measurement circuit for three-electrode AC PDP. It includes a charge-compensation network, current-integrating capacitors, initializing switches, and an op-amp. With this equipment, we measure the wall charge variations for the effects of sustain voltage, sustain pulse width, sustain frequency, and neighboring cells.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.3
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• pp.386-392
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• 1996

Zinc-Borosilicate is used as a side insulator wall to make high breakdown voltage with one Field Limiting Ring in a power p-n junction device in simulation. It is known that surface charge density can be yield at the interface of Zinc-Borosilicate glass / silicon system. When the glass is used as a side insulator wall, surface charge varied potential distribution and breakdown voltage is improved 1090 V under the same structure.The breakdown voltage under varying the surface charge density has a limit value. When the epitaxial thickness is varied, the position of FLR doesn't influence to the breakdown characteristic not only under non punch-through structure but also under punch-through structure. (author). 7 refs., 12 figs., 2 tabs.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.412-415
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• 2008

It is known that the address discharge delay time during an address period strongly depends on the wall charge leakage. It was observed that the wall charge leakage during an address period is related to both the address width and the ambient temperature. Accordingly, the effects of address electrode width on the address discharge and wall voltage variation during an address period were examined under variable temperatures.

• Journal of Information Display
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• v.2 no.1
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• pp.24-33
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• 2001

The characteristics of the reset and the address discharges of an alternating current Plasma Display Panel (ac PDP) were studied using 2-dimensional numerical discharge cell simulation. We investigated the wall charge variations during the reset discharge adopting ramping reset pulse and the subsequent addressing discharge. The roles of the ramping reset scheme can be divided into two stages, each electrode gathers wall charges during ramping-up of the initial stage and the built-up wall charges are lost during ramping-down of the later stage. Address discharge does not only change the wall charge distributions on the address and the scan electrodes but also on the sustain electrode. The increase in the wall charges on the sustain electrode was observed with the variation of the applied voltage to the sustain electrode during the address period. The increase of the applied voltage to the sustain electrode during the address period is expected to induce the decrease of the sustain voltage during the display period.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.103-107
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• 2000

The relationships between driving voltage and the wall charge distribution in the address period of surface discharge type AC Plasma Display Panel have been investigated. The quantity of wall charge on each electrode are detected simultaneously from the electrode current after applying only one addressing discharge pulse. The wall charge Qy on the scan electrode Y is nearly the sum of Qx on the address electrode X and Qz on the sustain electrode Z. The Qy increased with the driving voltage regardless of the kind of electrode, whereas the address time Td decreased, Qz and Qy are increased considerably with the blocking voltage Vz, whereas Qx is decreased. The increase rate of Qx, Qy and Qz for increase in Vz was $-13{\times}10^{-2}$ (pc/Vz), and $60{\times}10^{-2}$ (pc/Vz) and $70{\times}10^{-2}$(pc/Vz), respectively.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1830-1833
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• 2000

The relationships between driving voltage and the wall charge distribution in the address period of surface discharge type AC Plasma Display Panel have been investigated. The quantity of wall charge on each electrode are detected simultaneously from the electrode current after applying only one addressing discharge pulse. The wall charge Qy on the scan electrode Y is nearly the sum of Qx on the address electrode X and Qz on the sustain electrode 2. The Qy increased with the driving voltage regardless of the kind of electrode, whereas the address time Td decreased, Qz and Qy are increased considerably with the blocking voltage Vz, whereas Qx is decreased. The increase rate of Qx, Qy and Qz for increase in Vz was $-13{\times}10^{-2}$(pc/Vz), and $60{\times}10^{-2}$(pc/Vz) and $70{\times}10^{-2}$(pc/Vz), respectively.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1072-1074
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• 1995

Zinc-Borosilicate is used as a side insulastor wall to make high breakdown voltage with one Field Limiting Ring in a p-n junction. It is known that surface charge can be yield at the interface of Zinc-Borosilicate Glass/Silicon system. When the glass is used as a side insulator wall, surface charge varied potential distribution and breakdown voltage improved more than 660V without using more FLR.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.702-705
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• 2003

We reported the result of driving PDP's in selective erase scheme and three wall charge states. Compared to the selective write driving scheme, the selective erase scheme achieved flicker free half-ON state with much simpler driving waveforms than the selective write scheme. We believed that this improvement was possible since the cells entering the address period with enough wall charges to modulate easily with.

• Journal of Information Display
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• v.1 no.1
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• pp.42-47
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• 2000

The relationship between driving voltage and the amount of wall charge in the address period of surface discharge type AC Plasma Display Panel has been investigated. The amount of wall charge on each electrode is obtained simultaneously from the current profiles after applying only one addressing discharge pulse. The wall charge $Q_y$ on the scan electrode Y is almost the sum of $Q_x$ on the address electrode X and $Q_z$ on the sustain electrode Z. The $Q_y$ increased with the driving voltage regardless of the kind of electrode, whereas the addressing $T_d$ decreased. The $Q_x$ and $Q_y$ are increased considerably by blocking voltage $V_z$, whereas $Q_x$ is decreased. The $V_z$ dependence of $Q_x$ $Q_y$ and ${\varrho}_z$ in addressing discharge was $-13{\times}10^{-2}$ (pc/$V_z$), and $60{\times}10^{-2}$ ($pc/V_z$) and $70{\times}10^{-2}(pc/V_z)$, respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.764-767
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• 2003

We have experimentally investigated the influence of wall charge configurations prior to addressing discharge on dynamic margin in AC plasma display panel. In this experiment, we have analyzed the quantity and polarity of wall charge accumulated on the front and rear dielectrics just prior to the addressing discharge under the conventional driving sequence.