• Title/Summary/Keyword: Wafer-to-Wafer

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Monitering System of Silicon Wafer Grinding Process Using for the Change of Motor Current (모터 전류 변화를 이용한 실리콘 웨이퍼 연삭 공정 모니터링 시스템)

  • Park S.J.;Kim S.Y.;Lee S.J.;Park B.Y.;Jeong H.D.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.104-107
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    • 2005
  • Recently, according to the development of semiconductor industry, needed to high-integration and high-functionality. These changes are required for silicon wafer of large scale diameter and precision of TTV (Total Thickness variation). So, in this research, suggest that the method of monitoring system is using motor current. This method is needed for observation of silicon wafer grinding process. Motor current sensor is consisted of hall sensor. Hall sensor is known to catching of change of current. Received original signal is converted to the diginal, then, it is calculated RMS values, and then, it is analysed in computer. Generally, the change of force is relative to the change of current, So this reason, in this research tried to monitoring of motor current change, and then, it will be applied to analysis for silicon wafer grinding process. using motor current sensor.

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A Prediction Method of Temperature Distribution on the Wafer in a Rapid Thermal Process System with Multipoint Sensing (고속 열처리 시스템에서 웨이퍼 상의 다중점 계측에 의한 온도 분포 추정 기법 연구)

  • Sim, Yeong-Tae;Lee, Seok-Ju;Min, Byeong-Jo;Jo, Yeong-Jo;Kim, Hak-Bae
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.2
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    • pp.62-67
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    • 2000
  • The uniformity of temperature on a wafer is one of the most important parameters to control the RTP (Rapid Thermal Process) with proper input signals. Since it is impossible to achieve the uniformity of temperature without exact estimation of temperature at all points on the wafer, the difficulty of understanding internal dynamics and structural complexities of the RTP is a primary obstacle to accurately measure the distributed temperatures on the wafer. Furthermore, it is also hard to accomplish desirable estimation because only few pyrometers have been commonly available in the general equipments. In the paper, a thermal model based on the chamber geometry of the AST SHS200 RTP system is developed to effectively control the thermal uniformity on the wafer. First of all, the estimation method of one-point measurement is developed, which is properly extended to the case of multi-point measurements. This thermal model is validated through certain simulation and experiments. The work can be usefully contributed to building a run-by-run or a real-time controls of the RTP.

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Critical review of retrospective exposure assessment methods used to associate the reproductive and cancer risks of wafer fabrication workers (반도체 웨이퍼 가공 근로자의 생식독성과 암 위험 역학연구에서 과거 노출평가 방법 고찰)

  • Park, Donguk;Lee, Kyungmoo
    • Journal of Korean Society of Occupational and Environmental Hygiene
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    • v.22 no.1
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    • pp.9-19
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    • 2012
  • Objectives: The aim of this study is to critically review the exposure surrogates and estimates used to associate health effects in wafer fabrication workers such as spontaneous abortion and cancer, as well as to identify the limitations of retrospective exposure assessment methods Methods: Epidemiologic and exposure-assessment studies of wafer fabrication operations in the semiconductor industry were collected. Retrospective exposure-assessment methods used in cancer risk and mortality and reproductive toxicity were reviewed. Results: Eight epidemiologic papers and two reports compared cancer risk among workers in wafer fabrication facilities in the semiconductor industry with the risk of the general population. Exposure surrogates used in those cancer studies were fabrication(vs. non-fabrication), employment duration, manufacturing eras, job title (operator vs. maintenance worker) and qualitative classifications of agents without assessing specific agent or job-specific exposure. In contrast, specific operation, job title and agents were used to classify the exposure of fabrication workers, contributing to finding a significant association with spontaneous abortion (SAB). Conclusion: Further epidemiologic studies of fabrication workers using more refined exposure assessment methods are warranted in order to examine the associations between fabrication work, environment, and specific agents with cancer risk or mortality as used in SAB epidemiologic studies.

Effect on protective coating of vacuum brazed CMP pad conditioner using in Cu-slurry (Cu 용 슬러리 환경에서의 보호성 코팅이 융착 CMP 패드 컨니셔너에 미치는 영향)

  • Song M.S.;Gee W.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.434-437
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    • 2005
  • Chemical Mechanical Polishing (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. In general, CMP is a surface planarization method in which a silicon wafer is rotated against a polishing pad in the presence of slurry under pressure. The polishing pad, generally a polyurethane-based material, consists of polymeric foam cell walls, which aid in removal of the reaction products at the wafer interface. It has been found that the material removal rate of any polishing pad decreases due to the so-called 'pad glazing' after several wafer lots have been processed. Therefore, the pad restoration and conditioning has become essential in CMP processes to keep the urethane polishing pad at the proper friction coefficient and to allow effective slurry transport to the wafer surface. Diamond pad conditioner employs a single layer of brazed bonded diamond crystals. Due to the corrosive nature of the polishing slurry required in low pH metal CMP such as copper, it is essential to minimize the possibility of chemical interaction between very low pH slurry (pH <2) and the bond alloy. In this paper, we report an exceptional protective coated conditioner for in-situ pad conditioning in low pH Cu CMP process. The protective Cr-coated conditioner has been tested in slurry with pH levels as low as 1.5 without bond degradation.

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An investigation on dicing 28-nm node Cu/low-k wafer with a Picosecond Pulse Laser

  • Hsu, Hsiang-Chen;Chu, Li-Ming;Liu, Baojun;Fu, Chih-Chiang
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.4
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    • pp.63-68
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    • 2014
  • For a nanoscale Cu/low-k wafer, inter-layer dielectric (ILD) and metal layers peelings, cracks, chipping, and delamination are the most common dicing defects by traditional diamond blade saw process. Sidewall void in sawing street is one of the key factors to bring about cracks and chipping. The aim of this research is to evaluate laser grooving & mechanical sawing parameters to eliminate sidewall void and avoid top-side chipping as well as peeling. An ultra-fast pico-second (ps) laser is applied to groove/singulate the 28-nanometer node wafer with Cu/low-k dielectric. A series of comprehensive parametric study on the recipes of input laser power, repetition rate, grooving speed, defocus amount and street index has been conducted to improve the quality of dicing process. The effects of the laser kerf geometry, grooving edge quality and defects are evaluated by using scanning electron microscopy (SEM) and focused ion beam (FIB). Experimental results have shown that the laser grooving technique is capable to improve the quality and yield issues on Cu/low-k wafer dicing process.

The Study on the Machining Characteristics of 4 inch Wafer for the Optimal Condition (최적 가공 조건을 위한 4인치 웨이퍼의 가공 특성에 관한 연구)

  • Won, Jong-Koo;Lee, Jung-Taik;Lee, Jung-Hun;Lee, Eun-Sang
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.16 no.5
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    • pp.90-95
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    • 2007
  • Single side final polishing is a very important role to stabilize a wafer finally before the device process on the wafer is executed. In this study, the machining variables, such as pressure, machining time, and the velocity of pad table were adopted. These parameters have the major influence on the characteristics of wafer polishing. We investigated the surface roughness changing these variables to find the optimal polishing condition. Pad, slurry, slurry quantity, and oscillation distance were set to the fixed variables. In order to reduce defects and find a stable machining condition, a hall sensor was used on the polishing process. AE sensor was attached to the polishing machine to verify optimal condition. Applying data analysis of the sensor signal, experiments were performed. We can get better surface roughness from loading the quasi static force and improving wafer-holding method.

Modification of the Supporting Structure of a Wafer Polishing Machine for the Improved Stability (안정성 향상을 위한 Wafer Polishing Machine의 지지구조 개선)

  • Ro, Seung-Hoon;Kim, Young-Jo;Kim, Dong-Wook;Yi, Il-Hwan;Park, Keun-Woo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.11 no.2
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    • pp.144-151
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    • 2012
  • Polishing is not only one of the most frequently adopted processes in modern industries, but also the most critical one to the surface quality of the products such as semi conductor wafers and LED sapphire wafers. With the required specifications for the wafer surface quality getting more and more strengthened, the manufacturers are spending huge amount of cost to renew the machine to meet the enhanced surface specifications. Surface qualities of the wafers are mostly damaged by the structural vibrations of the polishing machines. In this paper, the dynamic characteristics of a wafer polishing machine have been analyzed through the frequency response test and the computer simulation. And the supporting structure of a polishing machine has been investigated to minimize the vibration transmissions, to improve the stability of the machine and further to reduce the defects of the polished products. The result of the study shows that simple design modifications of the supporting structure without altering the main structure of the machine can substantially suppress the vibrations of the machine with negligible expenses.

Online Experts Screening the Worst Slicing Machine to Control Wafer Yield via the Analytic Hierarchy Process

  • Lin, Chin-Tsai;Chang, Che-Wei;Wu, Cheng-Ru;Chen, Huang-Chu
    • International Journal of Quality Innovation
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    • v.7 no.2
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    • pp.141-156
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    • 2006
  • This study describes a novel algorithm for optimizing the quality yield of silicon wafer slicing. 12 inch wafer slicing is the most difficult in terms of semiconductor manufacturing yield. As silicon wafer slicing directly impacts production costs, semiconductor manufacturers are especially concerned with increasing and maintaining the yield, as well as identifying why yields decline. The criteria for establishing the proposed algorithm are derived from a literature review and interviews with a group of experts in semiconductor manufacturing. The modified Delphi method is then adopted to analyze those results. The proposed algorithm also incorporates the analytic hierarchy process (AHP) to determine the weights of evaluation. Additionally, the proposed algorithm can select the evaluation outcomes to identify the worst machine of precision. Finally, results of the exponential weighted moving average (EWMA) control chart demonstrate the feasibility of the proposed AHP-based algorithm in effectively selecting the evaluation outcomes and evaluating the precision of the worst performing machines. So, through collect data (the quality and quantity) to judge the result by AHP, it is the key to help the engineer can find out the manufacturing process yield quickly effectively.

θz Stage Design and Control Evaluation for Wafer Hybrid Bonding Precision Alignment (Wafer Hybrid Bonding 정밀 정렬을 위한 θz 스테이지 설계 및 제어평가)

  • Mun, Jea Wook;Kim, Tae Ho;Jeong, Yeong Jin;Lee, Hak Jun
    • Journal of the Semiconductor & Display Technology
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    • v.20 no.4
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    • pp.119-124
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    • 2021
  • In a situation where Moore's law, which states that the performance of semiconductor integrated circuits doubles every two years, is showing a limit from a certain point, and it is difficult to increase the performance due to the limitations of exposure technology.In this study, a wafer hybrid method that can increase the degree of integration Various research on bonding technology is currently in progress. In this study, in order to achieve rotational precision between wafers in wafer hybrid bonding technology, modeling of θz alignment stage and VCM actuator modeling used for rotational alignment, magnetic field analysis and desgin, control, and evaluation are performed. The system of this study was controlled by VCM actuator, capactive sensor, and dspace, and the working range was ±7200 arcsec, and the in-position and resoultion were ±0.01 arcsec. The results of this study confirmed that safety and precise control are possible, and it is expected to be applied to the process to increase the integration.

A Study on Improving the Accuracy of Wafer Align Mark Center Detection Using Variable Thresholds (가변 Threshold를 이용한 Wafer Align Mark 중점 검출 정밀도 향상 연구)

  • Hyeon Gyu Kim;Hak Jun Lee;Jaehyun Park
    • Journal of the Semiconductor & Display Technology
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    • v.22 no.4
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    • pp.108-112
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    • 2023
  • Precision manufacturing technology is rapidly developing due to the extreme miniaturization of semiconductor processes to comply with Moore's Law. Accurate and precise alignment, which is one of the key elements of the semiconductor pre-process and post-process, is very important in the semiconductor process. The center detection of wafer align marks plays a key role in improving yield by reducing defects and research on accurate detection methods for this is necessary. Methods for accurate alignment using traditional image sensors can cause problems due to changes in image brightness and noise. To solve this problem, engineers must go directly into the line and perform maintenance work. This paper emphasizes that the development of AI technology can provide innovative solutions in the semiconductor process as high-resolution image and image processing technology also develops. This study proposes a new wafer center detection method through variable thresholding. And this study introduces a method for detecting the center that is less sensitive to the brightness of LEDs by utilizing a high-performance object detection model such as YOLOv8 without relying on existing algorithms. Through this, we aim to enable precise wafer focus detection using artificial intelligence.

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