• 반도체디스플레이기술학회지
• /
• 제22권4호
• /
• pp.66-71
• /
• 2023

This paper describes a hybrid cleaning method of silicon wafer combining nano-bubble and ultrasound to remove sub-micron particles and contaminants with minimal damage to the wafer surface. In the megasonic cleaning process of semiconductor manufacturing, the cavitation induced by ultrasound can oscillate and collapse violently often with re-entrant jet formation leading to surface damage. The smaller size of cavitation bubbles leads to more stable oscillations with more thermal and viscous damping, thus to less erosive surface cleaning. In this study, ultrasonic energy was applied to the wafer surface in the DI water to excite nano-bubbles at resonance to remove contaminant particles from the surface. A patented nano-bubble generator was developed for the generation of nano-bubbles with concentration of 1×10⁹ bubbles/ml and nominal nano-bubble diameter of 150 nm. Ultrasonic nano-bubble technology improved a contaminant removal efficiency more than 97% for artificial nano-sized particles of alumina and Latex with significant reduction in cleaning time without damage to the wafer surface.

• 대한기계학회논문집B
• /
• 제32권2호
• /
• pp.149-157
• /
• 2008

During CVD process of semiconductor wafer fabrication, maintaining the uniformity of temperature distribution at wafer top surface is one of the key factors affecting the quality of final products. Effect of contact conductance between wafer and hot plate on predicted temperature of wafer was investigated. The validity of opaque wafer assumption was also examined by comparing the predicted results with Discrete Ordinate solutions accounting for semitransparent radiative characteristics of silicon. As the contact conductance increases predicted wafer temperature increases and the differences between maximum and minimum temperatures within wafer and between wafer and hot plate top surface temperatures decrease. The opaque assumption always overpredicted the wafer temperature compared to semitransparent calculation. The influences of surrounding reactor inner wall temperature and hot plate configuration are then discussed.

• 한국정밀공학회지
• /
• 제34권2호
• /
• pp.107-114
• /
• 2017

In this investigation, we describe a metrological technique for surface and thickness profiles of a silicon (Si) wafer by using a 6 degree of freedom (DOF) stitching method. Low coherence scanning interferometry employing near infrared light, partially transparent to a Si wafer, is adopted to simultaneously measure the surface and thickness profiles of the wafer. For the large field of view, a stitching method of the sub-aperture measurement is added to the measurement system; also, 6 DOF parameters, including the lateral positioning errors and the rotational error, are considered. In the experiment, surface profiles of a double-sided polished wafer with a 100 mm diameter were measured with the sub-aperture of an 18 mm diameter at $10\times10$ locations and the surface profiles of both sides were stitched with the sub-aperture maps. As a result, the nominal thickness of the wafer was $483.2{\mu}m$ and the calculated PV values of both surfaces were $16.57{\mu}m$ and $17.12{\mu}m$, respectively.

• 반도체디스플레이기술학회지
• /
• 제12권4호
• /
• pp.39-44
• /
• 2013

In the semiconductor heat-treatment process, the temperature uniformity determines the film quality of a wafer. This film quality effects on the overall yield rate. The heat transfer of the wafer surface in the heat-treatment process equipment is occurred by convection and radiation complexly. Because of this, there is the nonlinearity between the wafer temperature and reactor. Therefore, the accurate prediction of temperature on the wafer surface is difficult without the direct measurement. The thermal camera and the T/C wafer are general ways to confirm the temperature uniformity on the heat-treatment process. As above ways have limit to measure the temperature in the precise domain under the micro-scale. In this study, we developed the thin film type temperature sensor using the MEMS technology to establish the system which can measure the temperature under the micro-scale. We combined the experiment and numerical analysis to verify and calibrate the system. Finally, we measured the temperature on the wafer surface on the semiconductor process using the developed system, and confirmed the temperature variation by comparison with the commercial T/C wafer.

• 한국세라믹학회지
• /
• 제36권8호
• /
• pp.863-870
• /
• 1999

SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2009년도 제38회 동계학술대회 초록집
• /
• pp.392-392
• /
• 2010

In this study, high-speed chemical dry thinning process of Si wafer and evolution of surface roughness were investigated. Direct injection of NO gas into the reactor during the supply of F radicals from $NF_3$ remote plasmas was very effective in increasing the Si thinning rate due to the NO-induced enhancement of surface reaction but thinned Si surface became roughened significantly. Addition of Ar gas, together with NO gas, decreased root mean square (RMS) surface roughness of thinned Si wafer significantly. The process regime for the thinning rate enhancement with reduced surface roughness was extended at higher Ar gas flow rate. Si wafer thinning rate as high as $22.8\;{\mu}m/min$ and root-mean-squared (RMS) surface roughness as small as 0.75 nm could be obtained. It is expected that high-speed chemical dry thinning process has possibility of application to ultra-thin Si wafer thinning with no mechanical damage.

• 한국공작기계학회논문집
• /
• 제11권5호
• /
• pp.58-64
• /
• 2002

Mirror surface finish of Si-wafers has been achieved by rotary in-feed machining with cup-type wheels in ELID grinding. But the diameter of the workpiece is limited with the diameter of the grinding wheel in the in-feed machining method. In this study, some finding experiments by the rotary surface grinding machine with straight type wheels were conducted, by which the possible grinding area of the workpiece is independent of the diameter of the wheels. For the purpose of investigating the grinding characteristics of large scale diametrical silicon wafer, grinding conditions such as rotation speed of grinding wheels and revolution of workpieces are varied, and grinding machine used in this experiment is rotary type surface grinding m/c equipment with an ELID unit. The surface ground using the SD8000 wheels showed that mirror like surface roughness can be attained near 2~6 nm in Ra.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2001년도 춘계학술대회 논문집
• /
• pp.946-949
• /
• 2001

Mirror surface finish of Si-wafers has been achieved by rotary in-feed machining with cup-type wheels in ELID grinding. But the diameter of the workpiece is limited with the diameter of the grinding wheel in the in-feed machining method. In this study, some grinding experiments by the rotary surface grinding machine with straight type wheels were conducted, by which the possible grinding area of the workpiece is independent of the diameter of the wheels. For the purpose of investigating the grinding characteristics of large scale diametral silicon wafer, grinding conditions such as rotation speed of grinding wheels and revolution of workpiece are varied, and grinding machine used in this experiment is rotary type surface grinding m/c equipped with an ELID unit. The surface ground using the SD8000 wheels showed that mirror like surface roughness can be attained near 2~6nm in Ra.

• 대한전자공학회논문지SD
• /
• 제45권8호
• /
• pp.11-16
• /
• 2008

본 논문에서는 먼저 RTP(Rapid Thermal Processor) 장치를 스트레스 측정에 용이한 구조로 제작하고 PC에서 통합 공정관리 시스템을 설계하였다. 다음으로는 Large deformation 이론을 바탕으로 반도체 웨이퍼 표면의 변형검사를 위한 레이져 인터페로미터리를 구성하였다. 궁극적으로 이러한 레이져장치로부터 웨이퍼 표면의 영상을 추출하고 세선화, 블록화 그리고 스트레스 분포도의 순서로 영상처리 하여 스트레스로 인한 웨이퍼 표면의 변형을 검사하였다. 실험을 하기 위해 변형이 이루어지도록 웨이퍼의 후면을 1mm정도 갈아낸 후 약 1000도에서 $3\sim4$회 열처리를 수행하였으며, 열처리를 가한 영상과 가하지 않은 영상을 통하여 웨이퍼 열처리 후 심각한 변형이 이루어졌음을 알 수 있었다.

• 한국생산제조학회지
• /
• 제20권4호
• /
• pp.395-400
• /
• 2011

Scanning Probe Lithography is a method to localized oxidation on single crystal silicon wafer surface. This study demonstrates nanometer scale non contact lithography process on (100) silicon (p-type) wafer surface using AFM(Atomic force microscope) apparatuses and pulse controlling methods. AFM-based experimental apparatuses are connected the DC pulse generator that supplies ultra short pulses between conductive tip and single crystal silicon wafer surface maintaining constant humidity during processes. Then ultra short pulse durations are controlled according to various experimental conditions. Non contact lithography of using ultra short pulse induces electrochemical reaction between micro-scale tip and silicon wafer surface. Various growths of oxides can be created by ultra short pulse non contact lithography modification according to various pulse durations and applied constant humidity environment.