• Korean Chemical Engineering Research
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• v.45 no.5
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• pp.493-499
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• 2007

Polymeric hydrogel particles were fabricated to demonstrate the scale-up possibilities with the Particle Replication In Non-wetting Templates (PRINT) process. A permanently etched, specifically designed master was made on a silicon wafer using conventional photolithography, then reactive ion etching. The master and substrate were used repeatedly to make a large number of identical elastomeric perfluoropolyethers (PFPE) replica molds. The PFPE replica molds were used to fabricate and harvest individual, monodisperse micron-sized particles using the PRINT process. A water-soluble polymer adhesive was used as a sacrificial layer for harvesting particles. Particles were composed of biodegradable poly (ethylene glycol) diacrylate (PEG-diA), and aminoethylacrylate (AEM) and 2-acryloxyethyltrimethyl ammonium chloride (AETMAC) were added to them for improving the uptake of the cells. This study suggested PRINT used to produce the uniformed and shape specific biodegradable polymer is the effective technique for the non viral vector for the drug and the gene delivery.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.185-188
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• 2001

Chemical mechanical polishing(CMP) process is widely used for global planarization of inter-metal dielectric (IMD) layer and inter-layer dielectric (ILD) for deep sub-micron technology. However, as the IMD and ILD layer gets thinner, defects such as micro-scratch lead to severe circuit failure, which affect yield. In this paper, for the improvement of CMP process, deionized water (DIW) pressure, purified $N_2 \; (PN_2)$ gas, slurry filter and high spray bar were installed. Our experimental results show that DIW pressure and $PN_2$ gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. Also, the filter installation in CMP polisher could reduce defects after CMP process, it is shown that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. However, the slurry filter is impossible to prevent defect-causing particles perfectly. Thus, we suggest that it is necessary to install the high spray bar of de-ionized water (DIW) with high pressure, to overcome the weak-point of slurry filter. Finally, we could expect the improvements of throughput, yield and stability in the ULSI fabrication process.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.1
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• pp.329-332
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• 2012

LEDs are using widely in a field of illumination, LCD LED backlight, mobile signals because they have several merits, such as low power consumption, long lifetime, high brightness, fast response, environment friendly. To achieve high performance LEDs, one needs to enhance output power, reduce operation voltage, and improve device reliability. In this paper, we have proposed that the optimum design and specialized process could improve the performance of LED chip. It was showed an output power of 7cd and input supplied voltage of 3.2V by the insertion technique of current blocking layer. In this paper, GaN-based LED chip which is built on the sapphire epi-wafer by selective MOCVD were designed and developed. After that, their performances were measured. It showed the output power of 7cd more than conventional GaN-based chip. It will be used the lighting source of a medical equipment and LCD LED TV with GaN-based LED chip.

• Korean Journal of Materials Research
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• v.9 no.9
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• pp.890-895
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• 1999

The recent important issue in solar cell fabrication is to adopt thin film silicon solar cells on cheap substrates. However, thin cells demand new grid design concept that all the contacts(to the emitter and base) be located on the front surface. Hence, the aim of the investigation presented in this paper was to determine the potential and the basic limitation of the design. With this concept, an interdigitated front grid structure was realized and cells were fabricated through a set of photolithography processes. Confirmed efficiencies of up to 11.5% were achieved on bonded SOI wafers with a cell thickness of 50$\mu\textrm{m}$ in the case of finger spacing more than $\mu\textrm{m}$ and a base width of 35$\mu\textrm{m}$. It was also shown from the results that the design rules for optimizing the base fraction and reducing the shadowing fraction are noted as an important technique to realize high-efficiency thin silicon solar cells.

• Korean Journal of Materials Research
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• v.16 no.2
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• pp.99-105
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• 2006

This paper reports an improved bonding method using the IPA (isopropyl alcohol) assisted low-temperature bonding process for the PMMA (polymethylmethacrylate) micro CE (capillary electrophoresis) chip. There is a problem about channel deformations during the conventional processes such as thermal bonding and solvent bonding methods. The bonding test using an IPA showed good results without channel deformations over 4 inch PMMA wafer at $60^{\circ}C$ and 1.3 bar for 10 minutes. The mechanism of IPA bonding was attributed to the formation of a small amount of vaporized acetone made from the oxidized IPA which allows to solvent bonding. To verify the usefulness of the IPA assisted low-temperature bonding process, the PMMA micro CE chip which had a $45{\mu}m$ channel height was fabricated by hot embossing process. A functional test of the fabricated CE chip was demonstrated by the separation of fluorescein and dichlorofluorescein. Any leakage of liquids was not observed during the test and the electropherogram result was successfully achieved. An IPA assisted low-temperature bonding process could be an easy and effective way to fabricate the PMMA micro CE chip and would help to increase the yield.

• Journal of Sensor Science and Technology
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• v.4 no.1
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• pp.3-8
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• 1995

n-ITO/p-PSL heterojunction photodetector have been fabricated on the Si wafer by using ITO(indium tin oxide) and PSL(porous silicon layer). They were anodized selectively by using silicon nitride and Ni-Cr/Au and were passivated by using ITO as well as being isolated by using mesa structure. With white light from 0 to 3000 Lux, the photocurrent varied linearly with incident light intensity. The reverse characteristics of fabricated devices were very stable up to a bias voltage of -40V and dark current density was about $40nA/mm^{2}$. When the device was exposed by Xe lamp whose wavelength range from 400nm to 1100nm, the maximum photo responsivity was about 0.6A/W between 600 and 700nm. Variation of the characteristics of fabricated devices after 5 weeks was negligible.

• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.15-22
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• 1996

FET type $Ca^{2+}$ sensor(Ca-ISFET) was fabricated by micropool and photolithographic method utilizing photosensitive polymer as membrane materials. When OMR-83 negative photoresist was used as membrane material, it gave good sensitivity by micropool method with dioctyladipate as plasticizer but it could not be used in the photolithographic method. When poly(viny1 butyral), PVB was used as membrane material, it gave relatively high sensitivity ($23{\pm}0.2\;mV/decade$) for $Ca^{2+}$ concentration range of $10^{-4}{\sim}10^{-1}\;mole/{\ell}$ by photolithographic method. PVB also provided good adhesion to the pH-ISFET base device without adhesion promoter pretreatment and any plasticizer.

• Korean Chemical Engineering Research
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• v.52 no.1
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• pp.26-39
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• 2014

Cu interconnection in electronic devices is fabricated via damascene process including Cu electrodeposition. In this review, Cu electrodeposition and superfilling for fabricating Cu interconnection are introduced. Superfilling results from the influences of organic additives in the electrolyte for Cu electrodeposition, and this is enabled by the local enhancement of Cu electrodeposition at the bottom of filling feature formed on the wafer through manipulating the surface coverage of organic additives. The dimension of metal interconnection has been constantly reduced to increase the integrity of electronic devices, and the width of interconnection reaches the range of few tens of nanometer. This size reduction raises the issues, which are the deterioration of electrical property and the reliability of Cu interconnection, and the difficulty of Cu superfilling. The various researches on the development of organic additives for the modification of Cu microstructure, the application of pulse and pulse-reverse electrodeposition, Cu-based alloy superfilling for improvement of reliability, and the enhancement of superfilling phenomenon to overcome the current problems are addressed in this review.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.71-74
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• 1996

Ta$_2$O$_{5}$ film ale recognized as promising capacitor dielectric for future DRAM\`s. The electrical properties of Ta$_2$O$_{5}$films greatly depend on the heating condition. In the practical fabrication process, several annealing process, such as the annealing of Al in H$_2$(about 40$0^{\circ}C$) and reflow of BPSG (borophosphosilicate glass) film in $N_2$(about 80$0^{\circ}C$), exist after deposition of Ta$_2$O$_{5}$ film. In this paper, we describe the temperature effect on the electrical properties of W/Ta$_2$O$_{5}$/Si structure. The thin film of Ta$_2$O$_{5}$ and tungsten have been deposited on p-si(100) wafer using the sputtering system. The heating temperature was varied from 500 to 90$0^{\circ}C$ in $N_2$for 30min and The degree of temperature is 100\`C. In a log(J/E$^2$) Vs 1/E plot of typical I-V data, we find a linear relationship for the temperature of 500, $600^{\circ}C$ and as deposition. This could indicate Fowler-Nordheim tunneling as the dominant mode of current transports. However, we can not find a linear relationship for the temperature above $700^{\circ}C$. This could not indicate Fowler-Nordheim tunneling as the dominant mode of current transport. The high frequency (1MHz) capacitance-voltage (C-V) of W/Ta$_2$O$_{5}$/Si Capacitor were investigated on the basis of shift in the threshold voltage and dielectric constant. The magnitude of the threshold voltage and dielectric constant depends on the heating temperature, and increases with heating temperature.temperature.

• 한국태양에너지학회:학술대회논문집
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• 2011.04a
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• pp.105-110
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• 2011

The doping procedure in crystalline silicon solar cell fabrication usually contains oxygen injection during drive-in process and removal of phosphorous silicate glass(PSG). In this paper, we studied the effect of oxygen injection and PSG on conversion efficiency of solar cell. The mono crystalline silicon wafers with $156{\times}156mm^2$, $200{\mu}m$, $0.5-3.0{\Omega}{\cdot}cm$ and p-type were used. After etching $7{\mu}m$ of the surface to form the pyramidal structure, the P(phosphorous) was injected into silicon wafer using diffusion furnace to make the emitter layer. After then, the silicon nitride was deposited by the PECVD with 80 nm thickness and 2.1 refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were formed by screen-printing method, followed by firing in 400-425-450-550-$880^{\circ}C$ five-zone temperature conditions to make the ohmic contact. Solar cells with four different types were fabricated with/without oxygen injection and PSG removal. Solar cell that injected oxygen during the drive-in process and removed PSG after doping process showed the 17.9 % conversion efficiency which is best in this study. This solar cells showed $35.5mA/cm^2$ of the current density, 632 mV of the open circuit voltage and 79.5 % of the fill factor.