• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.958-962
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• 2002

This paper reports on the fabrication of free-standing microstructures by DRIE (deep reactive ion etching). SOI (Si-on-insulator) structures with buried cavities are fabricated by SDB (Si-wafer direct bonding) technology and electrochemical etch-stop. The cavity was formed the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the formed cavity under vacuum condition at -760 mmHg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing (100$0^{\circ}C$, 60 min.), the SDB SOI structure with a accurate thickness and a good roughness was thinned by electrochemical etch-stop in TMAH solution. Finally, it was fabricated free-standing microstructures by DRIE. This result indicates that the fabrication technology of free-standing microstructures by combination SDB, electrochemical etch-stop and DRIE provides a powerful and versatile alternative process for high-performance bulk micromachining in MEMS fields.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.26 no.12
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• pp.1639-1645
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• 2002

Micro engine that includes Micro scale combustor is fabricated. Design target was focused on the observation of combustion driven actuation in MEMS scale. Combustor design parameters are somewhat less than the size recommended by feasibility test. The engine structure is fabricated by isotropic etching of the photosensitive glass wafers. Electrode formed by electroplating of the Nickel. Photosensitive glass can be etched isotropically with almost vertical angle. Bonding and assembly of structured photosensitive glass wafer form the engine. Combustor size was determined to be 1 mm scale. Movable piston is engraved inside the wafer. Ignition was done by nickel spark plug which was electroplated with thickness of 40 ${\mu}{\textrm}{m}$. The wafers were bonded by epoxy that resists high temperature. In firing test due to the bonding method and design tolerance pressure buildup by reaction was not confirmed. But ignition, flame propagation and actuation of micro structure from the reaction was observed. From the result basement of design and fabrication technology was obtained.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.3
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• pp.223-227
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• 2001

In this paper, the authors present the fabrication of high-yield Si thin-membranes by electrochemical etch-stop in tetramethyl ammonium hydroxide (TMAH): isopropyl alcohol (IPA):pyrazine solutions. The current-voltage (I-V) characteristics of n- and p-type Si in TMAH:IPA;pyrazine solutions were analysed, repsectively. Open circuit potential (OCP)and passivation potential (PP) of n- and p-type Si, respectively, were obtained and applied potential was selected between n- and p-type Si PPs. The electrochemical etch-stop method was applied to the fabrication of 801 micro-membranes with 20.0 $\mu\textrm{m}$ thickness on a 5" Si wafer. The average thickness of fabricated 801 micro-membranes on one wafer 20.03$\mu\textrm{m}$ and the standard deviation was ${\pm}$0.26$\mu\textrm{m}$. The Si surface of the etch-stopped micro-membranes was extremely flat with no noticeable taper or nonuniformity. The results indicate that use of the electrochemical etch-stop method for the etching of Si in TMAH:IPA;pyrazine solutions provides a powerful and versatile alternative process for fabricating high-yield Si micro-membranes.

• International Journal of Control, Automation, and Systems
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• v.4 no.3
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• pp.372-381
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• 2006

The purpose of this study was to develop a process management system to manage ingot fabrication and improve ingot quality. The ingot is the first manufactured material of wafers. Trace parameters were collected on-line but measurement parameters were measured by sampling inspection. The quality parameters were applied to evaluate the quality. Therefore, preprocessing was necessary to extract useful information from the quality data. First, statistical methods were used for data generation. Then, modeling was performed, using the generated data, to improve the performance of the models. The function of the models is to predict the quality corresponding to control parameters. Secondly, rule extraction was performed to find the relation between the production quality and control conditions. The extracted rules can give important information concerning how to handle the process correctly. The dynamic polynomial neural network (DPNN) and decision tree were applied for data modeling and rule extraction, respectively, from the ingot fabrication data.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.4-8
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• 2002

The typical mold method for FED (field emission display) fabrication is used to form a gate electrode, a gate oxide layer, and emitter tip after fabrication of a mold shape using wet-etching of Si substrate. However, in this study, new mold method using a side wall space structure was developed to make sharp emitter tips with the gate electrode. In new method, gate oxide layer and gate electrode layer were deposited on a Si wafer by LPCVD (low pressure chemical vapor deposition), and then BPSG (Boro phosphor silicate glass) thin film was deposited. After then, the BPSG thin film was flowed into the mold at high temperature in order to form a sharp mold structure. TiN was deposited as an emitter tip on it. The unfinished device was bonded to a glass substrate by anodic bonding techniques. The Si wafer was etched from backside by KOH-deionized water solution. Finally, the sharp field emitter array with gate electrode on the glass substrate was formed.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.7
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• pp.298-304
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• 2003

IPMC(Ionic Polymer-Metal Composite) is a highly sensitive actuator that shows a large deformation in presence of low applied voltage. Generally, IPMC can be fabricated by electroless plating of platinum on both sides of a Nafion (perfluorosulfonic acid) film. When a commercial Nafion film is used as a base structure of the IPMC membrane, the micro-pump structure and the IPMC membrane are fabricated separately and then later assembled, which makes the fabrication inefficient. Therefore, fabrication of an IPMC membrane and the micro-pump structure on a single wafer without the need of assembly have been developed. The silicon wafer was partially etched to hold liquid Nafion to be casted and a 60-${\mu}{\textrm}{m}$ thick IPMC membrane was realized. IPMC membranes with various size were fabricated by casting and they showed 4-2${\mu}{\textrm}{m}$ displacements from $4mm{\times}4mm$ , $6mm{\times}6mm$, $8mm{\times}8mm$ membranes at the applied voltage ranging from 2Vp-p to 5Vp-p at 0.5Hz. The displacement of the fabricated IPMC membranes is fairly proportional to the membrane area and the applied voltage.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.4
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• pp.53-60
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• 2003

CCD(Charge-Coupled Device) wafers, with a layer of micro lenses on top, usually are not passivated with dielectric films. Micro lenses, in general, are made of polymer material, which usually has a large affinity for particles generated in the various chip fabrication processes, most notably the wafer sawing for chip-dicing. The particles deposited on the micro lens layer either seriously attenuate or deflect the incoming light and often lead to CCD failure. In this study we introduce new type of saws which would significantly reduce the particle-related problems found in conventional type of saws. In the new saws, the positions and diverging angles of side and center nozzles have been optimized so as to flush the particles effectively. In addition, an independent nozzle is added for the sole purpose of flushing the generated particles. The test results show that, with the new saws. the ratio of the particle-related CCD chip failures has been dropped drastically from 9.1% to 0.63%.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.434-437
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• 2005

Chemical Mechanical Polishing (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. In general, CMP is a surface planarization method in which a silicon wafer is rotated against a polishing pad in the presence of slurry under pressure. The polishing pad, generally a polyurethane-based material, consists of polymeric foam cell walls, which aid in removal of the reaction products at the wafer interface. It has been found that the material removal rate of any polishing pad decreases due to the so-called 'pad glazing' after several wafer lots have been processed. Therefore, the pad restoration and conditioning has become essential in CMP processes to keep the urethane polishing pad at the proper friction coefficient and to allow effective slurry transport to the wafer surface. Diamond pad conditioner employs a single layer of brazed bonded diamond crystals. Due to the corrosive nature of the polishing slurry required in low pH metal CMP such as copper, it is essential to minimize the possibility of chemical interaction between very low pH slurry (pH <2) and the bond alloy. In this paper, we report an exceptional protective coated conditioner for in-situ pad conditioning in low pH Cu CMP process. The protective Cr-coated conditioner has been tested in slurry with pH levels as low as 1.5 without bond degradation.

• Korean Journal of Materials Research
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• v.16 no.10
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• pp.652-655
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• 2006

A direct wafer bonding process necessary for GaAs-on-insulator (GOI) fabrication with high thermal annealing temperatures was studied by using PECVD oxides between gallium arsenide and silicon wafers. In order to apply some uniform pressure on initially-bonded wafer pairs, a graphite sample holder was used for wafer bonding. Also, a tool for measuring the tensile forces was fabricated to measure the wafer bonding strengths of both initially-bonded and thermally-annealed samples. GaAs/$SiO_2$/Si wafers with 0.5-$\mu$m-thick PECVD oxides were annealed from $100^{\circ}C\;to\;600^{\circ}C$. Maximum bonding strengths of about 84 N were obtained in the annealing temperature range of $400{\sim}500^{\circ}C$. The bonded wafers were not separated up to $600^{\circ}C$. As a result, the GOI wafers with high annealing temperatures were demonstrated for the first time.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1921-1923
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• 2001

In this work, an array of resistance temperature detector(RTD) was fabricated inside the microchannel in order to investigate in-situ flow characteristics. A rectangular straight microchannel, integrated with RTD's for temperature sensing and a heat source for generating the temperature gradient along the channel. were fabricated with the dimension of $200{\mu}m(W){\times}{\mu}m(D){\times}$48mm(L), while RTD measured precise temperatures at the inside-channel wall. 4" $525{\pm}25{\mu}m$ thick P-type <100> Si wafer was used as a substrate. For the fabrication of RTDs. 5300$\AA$ thick Pt/Ti layer was sputtered on a Pyrex glass wafer. Finally, glass wafer was bonded with Si wafer by anodic bonding, therefore RTD was located inside the microchannel. The temperature distribution inside the fabricated microchannel was obtained from 4 point probe measurements and Dl water is used as a working fluid. Temperature distribution inside the microchannel was measured as a function of mass flow rate and heat flux. As a result, precise temperatures inside the microchannel could be obtained. In conclusion, this novel temperature distribution measurement system will be very useful to the accurate analysis of the flow characteristics in the microchannel.