• Title/Summary/Keyword: Voltage reduction

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Study of harmonic reduction method in PWM Inverter of washing machine BLDC motor that use single current sensor (단일 전류 감지기를 이용한 세탁기 BLDC 모터의 PWM Inverter 에서 고조파 저감방법에 관한 연구)

  • Kim, Hwa-Sung;Yoo, Ji-Yoon
    • Proceedings of the KIPE Conference
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    • 2007.11a
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    • pp.142-144
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    • 2007
  • This paper proposes problem improvement in existing method about three-phase current reconstruction method and present minimum voltage injection method and Smooth voltage injection method in single current sensor for washing machine motor drive. So, presented wash noise improvement method through ripple reduction in inverter. The simulation and experimental results are given to show the effectiveness of the proposed method for reconstructing the phase currents and reducing the noises.

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Low Power Optimization of MPEG-2 AAC with Microscopic Dynamic Voltage Scaling(DVS) (Microscopic Dynamic Voltage Scaling(DVS) 기반 저전력 MPEG-2 AAC 알고리즘 최적화 구현에 관한 연구)

  • Lee, Eun-Seo;Lee, Jae-Sik;Chang, Tae-Gyu
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.428-430
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    • 2006
  • This paper proposes a new means of performance optimization for multimedia algorithm utilizing the Microscopic DVS (Dynamic Voltage Scaling). The Microscopic DVS technique controls the operating frequency and the supply voltage levels dynamically according to the processing requirement for each frame of multimedia data. The huffman decoding algorithm of MPEG-2 AAC audio decoder is optimized to maximize the power saving efficiency of Microscopic DVS technique. The experimental results show the reduction of computational complexity by more than 30% and the reduction of power consumption by more than 17% compared with those of the conventionally fast method.

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Low Power Optimization of MPEG-2 AAC with Microscopic Dynamic Voltage Scaling(DVS) (Microscopic Dynamic Voltage Scaling(DVS) 기반 저전력 MPEG-2 AAC 알고리즘 최적화 구현에 관한 연구)

  • Lee, Eun-Seo;Lee, Jae-Sik;Chang, Tae-Gyu
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.55 no.12
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    • pp.544-546
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    • 2006
  • This paper proposes a new means of performance optimization for multimedia algorithm utilizing the Microscopic DVS (Dynamic Voltage Scaling). The Microscopic DVS technique controls the operating frequency and the supply voltage levels dynamically according to the processing requirement for each frame of multimedia data. The huffman decoding algorithm of MPEG-2 AAC audio decoder is optimized to maximize the power saving efficiency of Microscopic DVS technique. The experimental results show the reduction of computational complexity by more than 30% and the reduction of power consumption by more than 17% compared with those of the conventionally fast method.

A Switching Method of Single Phase Grid Connected Inverter for Common Mode Noise Reduction (계통연계형 단상인버터의 Common Mode Noise 저감을 위한 Switching 방법)

  • Lee, Seung-Ju;Hong, Chang-Pyo;Kim, Hag-Wone;Cho, Kwan-Yuhl
    • The Transactions of the Korean Institute of Power Electronics
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    • v.21 no.1
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    • pp.27-33
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    • 2016
  • A pulse-width modulation (PWM) method for common mode noise reduction in a PWM inverter connected to a single-phase grid is proposed in this study. The extensively used conventional switching method may experience common mode voltage problems, which generate current leakage and electromagnetic induction problems. In the proposed switching method, the neutral point of the output voltage is always fixed at both ends of the input voltage to reduce common mode noise. The validity of the proposed method is proven through simulation and experimental results.

An Experimental Study on the Noise Reduction and the Feasibility of Short Current of a Silencer for a High Voltage COS Fuse (고전압 COS 퓨즈용 소음기의 소음저감 및 전류차단 성능에 관한 실험적 연구)

  • Lee, Dong-Hoon;Song, Hwa-Young
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.18 no.7
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    • pp.783-789
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    • 2008
  • This experimental study describes the noise reduction and the feasibility of short current of a silencer for a high voltage COS(cut out switch) fuse of a transformer. When a high voltage COS fuse becomes a short circuit by the over current, the strong impulse noise over 150 dB(A) is generated. For the purpose of the reduction of impulse noise, in this study, the diffuser type and the reactive type silencers have been designed and tested, respectively. And also the electrical test on the short current is performed. From the experimental results, the well designed reactive type silencer has been shown to have the noise reduction of about 20 dB(A). It has been found that the feasibility of short current for the COS fuse is closely related to the porosity of the silencer.

Improved LCCT Z-Source DC-AC Inverter for Ripple Reduction of Input Current and Capacitor Voltage (입력전류와 커패시터 전압의 맥동저감을 위한 개선된 LCCT Z-소스 DC-AC 인버터)

  • Shin, Yeon-Soo;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.10
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    • pp.1432-1441
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    • 2012
  • In this study, an improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source inverter(Improved LCCT ZSI) with characteristics of Quasi Z-source inverter(QZSI) and LCCT Z-source inverter(LCCT ZSI) is proposed. The proposed inverter can also reduce the voltage stress and input current/capacitor voltage ripples compared with conventional LCCT ZSI and Quasi ZSI. A two winding trans in Z-impedance network of the conventional LCCT ZSI is replaced by a three winding trans in the proposed inverter. To verify the validity of the proposed inverter, a DSP controlled hardware was made and PSIM simulation was executed for each method. Comparing the current and voltage ripples of each method under the condition of input DC voltage 70[V] and output AC voltage 76[Vrms], the input current and capacitor voltage ripple factors of the proposed inverter were low as 11[%] and 1.4[%] respectively. And, for generation of the same output AC voltage of each method, voltage stress of the proposed inverter was low as 175[V] under the condition of duty ratio D=0.15. As mentioned above, we could know that the proposed inverter have the characteristics of low voltage stress, low ripple factor and low operation duty ratio compared with the conventional methods. Finally, the efficiency according to load change/duty ratio and the transient state characteristics were discussed.

Breakdown Voltage Improvement in SOI MOSFET Using Gate-Recessed Structure (게이트가 파인 구조를 이용한 SOI MOSFET에서의 항복전압 개선)

  • 최진혁;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.159-165
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    • 1995
  • A gate-recessed structure is introduced to SOI MOSFET's in order to increase the source-to-drain breakdown voltage. A significant increase in the breakdown voltage is observed compared with that of a planar single source/drain SOI MOSFET without inducing the appreciable reduction of the current drivability. We have analyzed the origin of the breakdown voltage improvement by the substrate current measurements and 2-D device simulations, and shown that the breakdown voltage improvement is caused by the reductions in the impact ionization rate and the parasitic bipolar current gain.

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A Novel Multi-Level Inverter Configuration for High Voltage Conversion System

  • Suh, Bum-Seok;Lee, Yo-Han;Hyun, Dong-Seok
    • Journal of Electrical Engineering and information Science
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    • v.1 no.2
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    • pp.109-118
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    • 1996
  • This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

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An Experimental Study on the Threshold Voltage and Punchthrough Voltage Reduction in Short-Channel NMOS Transistors (채널의 길이가 짧은 NMOS 트랜지스터의 Threshold 전압과 Punchthrough 전압의 감소에 관한 실험적연구)

  • Lee, Won-Sik;Im, Hyeong-Gyu;Kim, Bo-U
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.2
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    • pp.1-6
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    • 1983
  • The reduction of threshold voltage and punchthrough voltage of short channel MOS transistors has been measured experimentally with silicon gate NMOS transistors. The effects of the gate oxide thickness and substrate doping concentration on the threshold voltage and punch-through voltage have also been measured with sample devices with boron implantation and gate oxide thickness of 50 nm and 70 nm. Hot electron emission has been measured by floating gate method for the samples with 3 ${\mu}{\textrm}{m}$ channel length. It has been concluded from this measurement that hot electron emission is not significant for the channel length of 3${\mu}{\textrm}{m}$.

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A Study on the Bandwidth of Gear Reduction Servo System according to Backlash and Motor Supplied Voltage (백래시 및 모터 입력전압에 따른 기어감속 서보 시스템 대역폭에 관한 연구)

  • Baek, Joo-Hyun;Hong, Sung-Min;Yang, Tae-Suk;Kim, Soo-Hyun;Kwak, Yoon-Keun
    • Journal of the Korean Society for Precision Engineering
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    • v.19 no.6
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    • pp.119-127
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    • 2002
  • The paper presents the effect of the backlash magnitude and the supplied voltage of motor on the gear reduction servo system. The bandwidth of the system depends heavily on the supplied voltage of motor as well as the backlash magnitude. Specially, the bandwidth of the system increases as the supplied voltage of motor increases. 1t is shown that the system has the bandwidth of zero backlash in case of motor supplied voltage is infinite. It is also found that the magnitude of the supplied voltage of motor is very important in case of the analysis of the system bandwidth.