• 한국정보통신학회논문지
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• 제10권7호
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• pp.1281-1286
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• 2006

초고내압용 (1,200 V급) 의 플래너 접합 장벽 쇼트키 정류기 개발을 위해서 기존의 실리콘 재질 대신에 탄화규소 (4H-SiC) 제질을 사용하였다 . 기판의 크기는 2 인치 웨이퍼이며, 농도는 $3*10^{18}/cm^{3}$의 $n^{+}-$형이며, 에피층은 두께 $12{\mu}m$, 농도는 $5*10^{15}/cm^{-3}\:n-$형이다. 제작 소자는 접합 장벽 쇼트키 다이오드이며, 항복전압을 개선시키기 위해 고농도 의 보론 보호테의 불순물 분포를 사각모양 설계하였으며, 보호태의 폭과 간격을 변화하였다 . 정류성 접촉 금속은 $Ni(3,000\:{\AA})/Au(2,000\:{\AA})$ 사용하였다 . 결과로써, 소자의 특성은 온-상태 전압이 1.26 V, 온-상태 저항은 m$45m{\Omega}/cm^{3}$으로 낮은 특성과역방향 항복전압은 1,180 V의 최대값이며, 이 항복전압의 역방향 누설전류밀도는 $2.26*10^{-5}A/CM^{3}$의 값이며, 전기적 파라미터의 특성 결과가 개선되었다.

• 한국기계기술학회지
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• 제13권1호
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• pp.17-22
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• 2011

As the quality of a weld joint is strongly influenced by process parameters the welding process, an intelligent algorithms that can predict the bead geometry and shape to accomplish the desired mechanical properties of the weldment should be developed. In this study, prepared by ${\Phi}1.6mm$ GMA welding of metal wire nose Advice jowelui 350A 600A grade level inverter welder and DAIHEN SCR's were carried out using welding. Welding conditions were 5.5m/min wire feed rate the welding current is rapidly transmit approximately 260A, welding voltage was about 30V. CTWD a 22mm, shielding gas was Ar 20L/min and the welding speed was a 240mm/min. Using data collected during welding equipment welding current and welding voltage waveform was analyzed by measuring the volume of the transition mode. Addition of $CaCO_3$ as a loss of the spread of the weld bead dilution rate decreased, suggesting that, GMA in the overlay welding bead shape control, dilution control and may be used as a welding flux is considered. Stabilizing effect of the arc by the Ca-containing $CaF_2$, $CaCO_3$, $CaMg(CO_3)_2$, respectively, welding flux 0.1wt.% added GMA welding and weld overlay were evaluated with dilution, $CaF_2$, and $CaMg(CO_3)_2$ added to the dilution of Seemed to increase.

• Journal of Electrochemical Science and Technology
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• 제10권1호
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• pp.22-28
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• 2019

To maximize the oxygen evolution reaction (OER) in the electrolysis of water, nano-grade $IrO_2$ powder with a low specific surface was prepared as a catalyst for a solid polymer electrolyte (SPE) system, and a membrane electrode assembly (MEA) was prepared with a catalyst loading as low as $2mg\;cm^{-2}$ or less. The $IrO_2$ catalyst was composed of heterogeneous particles with particle sizes ranging from 20 to 70 nm, having a specific surface area of $3.8m^2g^{-1}$. The anode catalyst layer of about $5{\mu}m$ thickness was coated on the membrane (Nafion 117) for the MEA by the decal method. Scanning electron microscopy (SEM) and electrochemical impedance spectroscopy (EIS) confirmed strong adhesion at the interface between the membrane and the catalyst electrode. Although the loading of the $IrO_2$ catalyst was as low as $1.1-1.7mg\;cm^{-2}$, the SPE cell delivered a voltage of 1.88-1.93 V at a current density of $1A\;cm^{-2}$ and operating temperature of $80^{\circ}C$. That is, it was observed that the over-potential of the cell for the oxygen evolution reaction (OER) decreased with increasing $IrO_2$ catalyst loading. The electrochemical stability of the MEA was investigated in the electrolysis of water at a current density of $1A\;cm^{-2}$ for a short time. A voltage of ~2.0 V was maintained without any remarkable deterioration of the MEA characteristics.

• 한국재료학회지
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• 제32권9호
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• pp.396-402
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• 2022

In this study, surface roughness and interfacial defect characteristics were analyzed after forming a high-k oxide film on the surface of a prime wafer and a test wafer, to study the possibility of improving the quality of the test wafer. As a result of checking the roughness, the deviation in the test after raising the oxide film was 0.1 nm, which was twice as large as that of the Prime. As a result of current-voltage analysis, Prime after PMA was 1.07 × 10 A/cm² and Test was 5.61 × 10 A/cm², which was about 5 times lower than Prime. As a result of analyzing the defects inside the oxide film using the capacitance-voltage characteristic, before PMA Prime showed a higher electrical defect of 0.85 × 10¹² cm^-2 in slow state density and 0.41 × 10¹³ cm^-2 in fixed oxide charge. However, after PMA, it was confirmed that Prime had a lower defect of 4.79 × 10¹¹ cm^-2 in slow state density and 1.33 × 10¹² cm^-2 in fixed oxide charge. The above results confirm the difference in surface roughness and defects between the Test and Prime wafer.

• 한국전기전자재료학회논문지
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• 제22권12호
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• pp.1067-1072
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• 2009

YBCO coated conductor is named by second generation superconductor tapes. It is different with first generation superconductor tapes. YBCO coated conductor's specific difference with Bi-2223/Ag tape is more strong mechanical durability. This is important role to apply to superconducting machines. For mechanical transforming of YBCO coated conductors, we are using the well designed former. The merit of transformation is several. First, we vary the superconducting characteristics according to mechanical stress. Second, we reduce the volume of superconductor, so we achieve reducing the volume of superconducting machines. On this study, we experiment the transporting current characteristics of one types YBCO coated conductor. YBCO coated conductor with Ie of 70 A and voltage grade of 0.6 V/cm were connected to spiral former to conduct current application test.

• 한국전기전자재료학회논문지
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• 제24권7호
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• 한국정밀공학회지
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• 제12권4호
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• pp.100-110
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• 1995

This paper aims at reviewing the possibility of application over normal or abnormal, detection used by AE, and the characteristics of grinding processes. In this study, when WA-vitri-fied ' resinoid bond grinding wheels:36 kinds of grinding wheel and grinding depth were tuned at the surface grinding, the zone of AE signal generation is theoretically modelled and reviewed by grinding processes. The variation of grinding resistance( F$n^{9}$ $F_{t}$) and AE signal is detected in-process by the use of AE measuring system. The tests are carried out in accordance with grain size and grade of grinding wheels, and work-pieces-STD11 and STD61. According to the experiment's results, the following can be expected;as grinding time passes by, the relation of grinding depth and quantity of AE signal, observing on AE signal and grinding burn suggest the characteristics of grinding processes and evalution on the possibility of control of grinding machine, and monitoring abnormal conditions.e, and monitoring abnormal conditions.

• 한국컴퓨터산업학회논문지
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• 제6권5호
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• pp.741-748
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• 2005

형광램프용 전자식 안정기의 효율개선 및 램프의 수명연장을 위하여 강유전체 커패시터와 시간지연스위칭회로로 구성된 절전모듈을 개발하고 적용하였다. 절전모듈에 사용된 강유전체 세라믹스를 이용하여 형광램프의 부저항특성과 최적화를 시키고, 시간지연회로를 통하여 점등초기 예열형에서 비예열형으로 스위칭시켜 점등 중 필라멘트에서 소비되는 전력을 제거함으로써 약 2W의 소비전력을 감소시켜 효율개선을 실현하였으며, 역기전력 제거기능을 통하여 점등 초기 형광램프 필라멘트에 가해지는 충격을 최소화함으로써 형광램프의 수명을 연장시켰다.

• 대한전자공학회논문지SD
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• 제38권2호
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• pp.87-94
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• 2001

DRAM에서 셀 캐패시터의 누설 전류 영향을 고려하여 소프트 에러율을 예측하였다. DRAM의 동작 과정에서 누설 전류의 영향으로 셀 캐패시터는 전하량이 감소하고, 이에 따른 소프트 에러율을 DRAM의 각 동작 모드에 대하여 계산하였다. 누설 전류가 작을 경우에는 /bit mode가 소프트 에러에 취약했지만, 누설전류가 커질수록 memory 모드가 소프트 에러에 가장 취약함을 보였다. 실제 256M급 DRAM의 구조에 적용하여, 셀 캐패시턴스, bit line 캐패시턴스, sense amplifier의 입력 전압 감도들이 변화할 때 소프트 에러에 미치는 영향을 예측하였고, 이 결과들은 차세대 DARM 연구의 최적 셀 설계에 이용될 수 있다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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• pp.217-219
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• 2005

To detect partial discharge of 154kV joint box, we have made experiment by using the HFCT sensor. Generally the signals which are detected in partial discharge test of underground power transmission cable are accompanied with both noises of high voltage and noises of surrounding power cable. The most noise in near to end part of joint box is corona, beside other noises flowed from surrounding area. Partial discharge test is difficulty due to these noises. First, we test reliability on both injection of calibration signal in NJB and removal of low frequency. After that, we had analyzed frequencies by measuring signals in IJB with 300[m] distance from NJB. Also we had measured S/N ratio by using the indirected injection method of calibration signal in IJB. In this experiment, two measurement methods were difference of detection acquisition, but these had the equal frequency properties.