• Journal of Power Electronics
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• 제17권3호
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• Journal of Power Electronics
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• 제17권1호
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• pp.222-231
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• 2017

In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.313-316
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• 2000

This paper proposes a new solution by carrier-based SVPWM method to solve the most serious problem of Flying Capacitor Multi-level Inverter that is unbalance of capacitor voltages The voltage unbalance is occurred by the difference of each capacitor's charging and discharging time applied to Flying Capacitor Multi-level Inverter. It controls the variation of capacitor voltages into the mean'0' during some period by means of new carriers using the leg voltage redundancy in the Inverter. The solution can be easily expanded to the multi-level. Also this method can make the switching loss and conduction loss of device equal by the use of leg voltage redundancy. First the unbalance of capacitor voltage is analyzed and the conventional theory of self-balance using phase-shifted carrier is reviewed. And then the new method that is suitable to the Flying Capacitor Inverter is explained. The simulation results would be shown to verify the proposed method

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.90-94
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• 1998

The parallel inverter is popularly used because of its fault-tolerance capability, high-current outputs at constant voltages and system modularity. The conventional parallel inverter usually employes active and reactive power control or frequency and voltage droop control. However, these approaches have the disadvantages that the response time of parallel inverter control is slow against load and system parameter variation to calculate active, reactive power, frequency and voltage. This paper describes a novel control scheme for power equalization in parallel connected inverter. The proposed scheme has a fast power balance control response, a simplicity of implementation, and inherent peak current limiting capability since it employes a instantaneous current/voltage control with output voltage and current balance and output voltage regulation. A design procedure for the proposed parallel inverter controller is presented. Futhermore, the proposed control scheme is verified through the simulation in various cases such as the system parameter variation, the control parameter variation and the nonlinear load condition.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.176-181
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• 1998

The parallel inverter is popularly used because of its fault-tolerance capability, high-current outputs at constant voltages and system modularity. The conventional parallel inverter usually employs active and reactive power control of frequency and voltage droop control. However, these approaches have the disadvantages that the response time of parallel inverter control is slow against load and system parameter variation to calculate active, reactive power, frequency and voltage. This paper describes a novel control scheme for power equalization in parallel-connected inverter. The proposed scheme has a fast power balance control response, a simplicity of implementation, and inherent peak current limiting capability since it employees an instantaneous current/voltage control with output voltage and current balance and output voltage regulation. A design procedure for the proposed parallel inverter controller is presented. Furthermore, the proposed control scheme is verified through the experiment in various cases such as the system parameter variation, the control parameter variation and the nonlinear load condition.

• 전력전자학회논문지
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• 제24권2호
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• pp.120-126
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• 2019

This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.

• Journal of Electrical Engineering and Technology
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• 제9권3호
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• pp.964-969
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• 2014

In Super Junction MOSFET, Charge Balance is the most important issue of the trench filling Super Junction fabrication process. In order to achieve the best electrical characteristics, the N type and P type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, called Charge Balance Condition. In this paper, two methods from the fabrication process were used at the Charge Balance condition: Trench angle decreasing process and Bottom implantation process. A lower on-resistance could be achieved using a lower trench angle. And a higher breakdown voltage could be achieved using the bottom implantation process. The electrical characteristics of manufactured discrete device chips are compared with those of the devices which are designed of TCAD simulation.

• Journal of Power Electronics
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• 제18권6호
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• pp.1683-1696
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• 2018

Under the conventional control strategy, the asymmetry of arm impedances may result in the poor operating performance of modular multilevel converters (MMCs). For example, fundamental frequency oscillation and double frequency components may occur in the dc and ac sides, respectively; and submodule (SM) capacitor voltages among the arms may not be balanced. This study presents an enhanced control strategy to deal with these problems. A mathematical model of an MMC with asymmetric arm impedance is first established. The causes for the above phenomena are analyzed on the basis of the model. Subsequently, an enhanced current control with five integrated proportional integral resonant regulators is designed to protect the ac and dc terminal behavior of converters from asymmetric arm impedances. Furthermore, an enhanced capacitor voltage control is designed to balance the capacitor voltage among the arms with high efficiency and to decouple the ac side control, dc side control, and capacitor voltage balance control among the arms. The accuracy of the theoretical analysis and the effectiveness of the proposed enhanced control strategy are verified through simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.576-588
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• 2014

The superiority of CMI (Cascaded Multilevel Inverter) is unparalleled in high power and high voltage STATCOM (Static Synchronous Compensator). However, the parameters and operating conditions of each individual power unit composing the cascaded STATCOM differ from unit to unit, causing unit voltage disequilibrium on the DC side. This phenomenon seriously impairs the operation performance of STATCOM, and thus maintaining the DC voltage balance and stability becomes critical for cascaded STATCOM. This paper analyzes the case of voltage disequilibrium, combines the operation characteristics of the cascaded STATCOM, and proposes a new DC voltage control scheme with the advantages of good control performance and stability. This hierarchical control method uses software to achieve the total active power control and also uses chopper controllers to enable that the imbalance power can flow among the capacitors in order to keep DC capacitor voltages balance. The operating principle of the chopper controllers is analyzed and the implementation is presented. The major advantages of the proposed control strategy are that the number of PI regulators has been decreased remarkably and accordingly the blindness of system design and debugging also reduces obviously. The simulation reveals that the proposed control scheme can achieve the satisfactory control goals.

• 전력전자학회논문지
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• 제22권2호
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• pp.95-101
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• 2017

A simple and practical voltage balance method for a solid-state transformer (SST) is proposed to reduce the voltage difference of cascaded H-bridge converters. The tolerance device components in SST cause the imbalance problem of DC-link voltage in the H-bridge converter. The Max/Min algorithms of voltage balance controller are merged in the controller of an AC/DC rectifier to reduce the voltage difference. The DC-link voltage through each H-bridge converter can be balanced with the proposed control methods. The design and performance of the proposed SST are verified by experimental results using a 30 kW prototype.