• 제목/요약/키워드: Voltage Regulator

검색결과 411건 처리시간 0.024초

분산전원이 연계된 배전계통에 있어서 선로전압조정장치(SVR)의 전압제어 개선방안 (Improvement Method of SVR Control in Power Distribution System Interconnected Distributed Generator)

  • 이현옥;허재선;김병기;노대석;김재철
    • 전기학회논문지
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    • 제63권2호
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    • pp.224-229
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    • 2014
  • This paper presents the novel voltage control method in power distribution system with distributed generators. The voltage in distribution systems is regulated by Under Load Tap Changer(ULTC) of substation and pole transformer of primary feeders. Recently, Step Voltage Regulator(SVR) is getting located at distribution feeders to regulate effectively voltage of primary feeders. But the effectiveness of SVR decreases due to independent operation between SVR and ULTC, and also the existing Line Drop Compensator(LDC) method considering the distributed generators may be not able to regulate the proper voltage in a permissible range. Thus, this paper presents a optimal voltage control algorithm of SVR by using the secondary voltage data of main transformer in substation.

저궤도 인공위성용 태양전력 조절기의 전류 불연속 모드 해석 (DCM Analysis of Solar Array Regulator for LEO Satellites)

  • 박희성;차한주
    • 전기학회논문지
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    • 제65권4호
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    • pp.593-600
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    • 2016
  • The solar array regulator for low earth orbit satellites controls a operating point of solar array for suppling electric power to the battery and the other units. Because the control object is reversed, the new approach for large and small signal analysis is needed despite using buck-converter for power stage. In this paper, the steady state analysis of solar array regulator is performed in continuous conduction mode and discontinuous conduction mode, and the border condition for each mode is established. Also, the small signal model of solar array regulator is established in discontinuous conduction mode. Experiments are carried on in worst condition which the solar array regulator can face with discontinuous conduction mode. The results show that the solar array regulator is in stable.

Effects of Imperfect Sinusoidal Input Currents on the Performance of a Boost PFC Pre-Regulator

  • Cheung, Martin K.H.;Chow, Martin H.L.;Lai, Y.M.;Loo, K.H.
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.689-698
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    • 2012
  • This paper investigates the effects of applying different input current waveshapes on the performance of a continuous-conduction-mode (CCM) power-factor-correction (PFC) boost pre-regulator. It is found that the output voltage ripple of the pre-regulator can be reduced if the input current is modified to include controlled amount of higher order harmonics. This finding allows us to balance the performance of output regulation and the harmonic current emission when coming to the design of the pre-regulator. An experimental PFC boost pre-regulator prototype is constructed to verify the analysis and show the benefit of the pre-regulator operating with input current containing higher order harmonics.

전압형 PWM 인버터에서의 새로운 데드 타임 보상 기법 (New Dead Time Compensation Method in Voltage-Fed PWM Inverter)

  • 류호선;김봉석;이주현;임익헌;황선환;김장목
    • 전력전자학회논문지
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    • 제11권5호
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    • pp.395-403
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    • 2006
  • 본 논문에서는 전압형 PWM 인버터에서의 새로운 데드 타임 보상 기법을 제안하였다. 전압형 PMW 인버터의 경우 데드 타임 영향과 스위칭 소자의 비선형적인 특성에 의해 전압 왜곡이 발생한다. 특히, 전압 왜곡은 정지 좌표계 상전류에 5차와 7차, 그리고 동기 좌표계 상전류에는 6차 고조파를 발생시킨다. 그 결과 d축 동기 PI 전류 제어기의 적분기 출력은 인버터 기본파 주파수의 6배에 해당하는 맥동을 가지고 있다. 본 논문에서는 d축 전류 제어기의 적분기 출력 신호를 데드 타임 보상을 위한 제어 신호로 사용하였다. 제안된 방법은 실험과 시뮬레이션을 통해 타당성을 검증하였다.

Output Noise Reduction Technique Based on Frequency Hopping in a DC-DC Converter for BLE Applications

  • Park, Ju-Hyun;Kim, Sung Jin;Lee, Joo Young;Park, Sang Hyeon;Lee, Ju Ri;Kim, Sang Yun;Kim, Hong Jin;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권5호
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    • pp.371-378
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    • 2015
  • In this paper, a different type of pulse width modulation (PWM) control scheme for a buck converter is introduced. The proposed buck converter uses PWM with frequency hopping and a low quiescent.current low dropout (LDO) voltage regulator with a power supply rejection ratio enhancer to reduce high spurs, harmonics and output voltage ripples. The low quiescent.current LDO voltage regulator is not described in this paper. A three-bit binary-to-thermometer decoder scheme and voltage ripple controller (VRC) is implemented to achieve low voltage ripple less than 3mV to increase the efficiency of the buck converter. An internal clock that is synchronized to the internal switching frequency is used to set the hopping rate. A center frequency of 2.5MHz was chosen because of the bluetooth low energy (BLE) application. This proposed DC-DC buck converter is available for low-current noise-sensitive loads such as BLE and radio frequency loads in portable communications devices. Thus, a high-efficiency and low-voltage ripple is required. This results in a less than 2% drop in the regulator's efficiency, and a less than 3mV voltage ripple, with -26 dBm peak spur reduction operating in the buck converter.

배전계통의 전압안정화를 위한 선로전압조정장치와 전지전력저장장치의 협조제어 알고리즘에 관한 연구 (A Study on the Coordination Control Algorithm of Step Voltage Regulator and Battery Energy Storage System for Voltage Regulation in Distribution System)

  • 김병기;왕종용;박재범;최성식;유경상;노대석
    • 전기학회논문지
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    • 제65권2호
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    • pp.269-278
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    • 2016
  • In order to maintain customer voltages within allowable limit($220{\pm}13V$) as much as possible, tap operation strategy of SVR(Step Voltage Regulator) installed in distribution system is very important, considering the scheduled delay time(30 sec) of SVR. However, the compensation of BESS(Battery Energy Storage System) during the delay time of SVR is being required because the customer voltages in distribution system interconnected with PV(Photovoltaic) system have a difficultly to be kept within allowable limit. Therefore, this paper presents the optimal voltage stabilization method in distribution system by using coordination operation algorithm between BESS and SVR. It is confirmed that customer voltage in distribution system can be maintained within allowable limit($220{\pm}13V$).

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1673-1681
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    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

New type of DC voltage regulator using optical fiber as sense line

  • Ikeda, Hiroaki;Li, Jinzhu;Miyashita, Masatoshi;Yoshida, Hirofumi;Andou, Minoru;Shinohara, Shigenobu;Tsuchiya, Etsuo;Nishimura, Ken-Ichi
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1989년도 한국자동제어학술회의논문집; Seoul, Korea; 27-28 Oct. 1989
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    • pp.877-880
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    • 1989
  • Described is a DC voltage regulator of new type where an optical fiber is used as a sense line to transmit the PFM signal, which represents the load voltage and its change, from the load to the controller so as to make the equivalent sense-line length short. The prototype version provides a load voltage change rate of 2.3% over the current range of 0A to 5A at 15V DC, with an output impedance of 0.06ohm.

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적응형 가변 전원 레귤레이터를 내장한 인공 망막용 전류 자극기 (Current Stimulator with Adaptive Supply Regulator for Artificial Retina Prosthesis)

  • 고형호
    • 센서학회지
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    • 제20권4호
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    • pp.254-259
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    • 2011
  • In this paper, a current stimulator circuit with adaptive supply regulator for retinal prosthesis is proposed. In current stimulation systems, the stimulating circuits with wide voltage swing range are needed due to the high impedance of the retina cell and microelectrodes. Thus, previous researches adopt the high voltage architecture to obtain the enough operating range. The high voltage architecture, however, could increase the power consumption and can damage the retina cells. The proposed circuit provides the adaptively regulated supply voltage by measuring the difference between desired stimulation current and the actual stimulation current. The proposed circuit can achieve the extended range of the allowable cell impedance, improved accuracy of the stimulation current, and higher biosafety.

슬라이닥스형 자동 전압 제어 장치에 관한 연구 (A Study on the Slidacs type Automatic Volgage Regulator)

  • 김성도;박정훈;홍성훈;강문성
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 D
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    • pp.2066-2068
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    • 2001
  • In this study, we have developed the automatic voltage regulator(AVR) with robust voltage controllability, high efficiency and low cost. In AVR, the output voltage is controlled by the Tap changing of the slidacs coil using DC motor. And AVR has the improved output voltage characteristics because of the modified configuration of a point of contact between the slidacs coil and the moving rod.

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