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New Dead Time Compensation Method in Voltage-Fed PWM Inverter  

Ryu, Ho-Seon (한전전력연구원)
Kim, Bong-Suck (한전전력연구원)
Lee, Joo-Hyun (한전전력연구원)
Lim, Ick-Hun (한전전력연구원)
Hwang, Seon-Hwan (부산대 전기공학과)
Kim, Jang-Mok (부산대 전기전자통신공학부)
Publication Information
The Transactions of the Korean Institute of Power Electronics / v.11, no.5, 2006 , pp. 395-403 More about this Journal
Abstract
This paper has proposed a new dead time compensation method for a voltage-fed PMW inverter. In the voltage-fed PMW inverter, a voltage distortion is generated by the dead time effect and the nonlinear characteristics of the switching devices. Especially, the distorted voltage causes 5th and 7th harmonics in the stationary phase currents, and 6th harmonic in the synchronous phase currents. As a result, the integrator output of the synchronous PI current regulator has the ripple corresponding to six times of the inverter output frequency. In this paper, the signal of the integrator output of the d-axis current regulator is used as the control signal for the dead time compensation. The experimental and simulation results are presented to verify the validity of the proposed method.
Keywords
Voltage-fed PMW Inverter; Dead Time; Voltage Distortion; Harmonics; Signal of the integrator output of the d-axis current regulator;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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