• Title/Summary/Keyword: Voltage Fluctuation

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Coordinated Control of DFIG System based on Repetitive Control Strategy under Generalized Harmonic Grid Voltages

  • Nian, Heng;Cheng, Chenwen;Song, Yipeng
    • Journal of Power Electronics
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    • v.17 no.3
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    • pp.733-743
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    • 2017
  • This paper develops a coordinated control strategy of the doubly fed induction generator (DFIG) system based on repetitive control (RC) under generalized harmonic grid voltage conditions. The proposed RC strategy in the rotor side converter (RSC) is capable of ensuring smooth DFIG electromagnetic torque that will enable the possible safe functioning of the mechanical components, such as gear box and bearing. Moreover, the proposed RC strategy in the grid side converter (GSC) aims to achieve sinusoidal overall currents of the DFIG system injected into the network to guarantee satisfactory power quality. The dc-link voltage fluctuation under the proposed control target is theoretically analyzed. Influence of limited converter capacity on the controllable area has also been studied. A laboratory test platform has been constructed, and the experimental results validate the availability of the proposed RC strategy for the DFIG system under generalized harmonic grid voltage conditions.

Effects of Wire speed Fluctuation on Arc Stability in GMA Welding (GMAW에서 와이어 송급속도의 변동이 아크안정성에 미치는 영향에 관한 연구)

  • 신현욱;최용범;성원호;장희석
    • Journal of Welding and Joining
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    • v.13 no.4
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    • pp.85-102
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    • 1995
  • Weld quality of GMA welding processes is closely related to arc stability. Although many researches on arc stability have been performed, real-time estimation of arc stability has not been attempted. For instance, Mita proposed a off-line statistical method in which short circuiting and arcing time, and voltage and current wave forms were sampled to assess arc stability. But this method is not suitable to assess arc stability for GMA welder which employ inverter power source due to its controlled current and voltage wave forms. In this paper, the relationship between are stability and wire feed rate fluctuation is analyzed to propose new criterion for inverter power source. When arc voltage and arc current and arcing time are analyzed, we can assess arc stability only for short circuit transfer mode. When wire feed rate is analyzed, we can estimate arc stability udner the condition of spray transfer mode as well. Hence, the wire feed rate is chosen for monitoring process variable to cover possible metal transfer modes in GMAW. Through this research, it has been identified that arc stability in GMA welding processes is closely related to wire fed rate. When inverter power source is used, conventional statistical method of estimating arc stability, such as Mita index, is no longer valid due to its controlled voltage and current wave forms. Arc stability has been also examined in phase plane diagram.

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Identification of Motor Parameters and Improvement of Voltage Error for Improvement of Back-emf Estimation in Sensorless Control of Low Speed Operation (저속 센서리스 제어의 역기전력 추정 성능 향상을 위한 모터 파라미터 추정과 전압 오차의 개선)

  • Kim, Kyung-Hoon;Yun, Chul;Cho, Nae-Soo;Jang, Min-Ho;Kwon, Woo-Hyen
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.67 no.5
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    • pp.635-643
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    • 2018
  • This paper propose a method to identify the motor parameters and improve input voltage error which affect the low speed position error of the back-emf(back electromotive force) based sensorless algorithm and to secure the operation reliability and stability even in the case where the load fluctuation is severe and the start and low speed operation frequently occurs. In the model-based observer used in this paper, stator resistance, inductance, and input voltage are particularly influential factors on low speed performance. Stator resistance can cause resistance value fluctuation which may occur in mass production process, and fluctuation of resistance value due to heat generated during operation. The inductance is influenced by the fluctuation due to the manufacturing dispersion and at a low speed where the change of the current is severe. In order to find stator resistance and inductance which have different initial values and fluctuate during operation and have a large influence on sensorless performance at low speed, they are commonly measured through 2-point calculation method by 2-step align current injection. The effect of voltage error is minimized by offsetting the voltage error. In addition, when the command voltage is used, it is difficult to estimate the back-emf due to the relatively large distortion voltage due to the dead time and the voltage drop of the power device. In this paper, we propose a simple circuit and method to detect the voltage by measuring the PWM(Pulse Width Modulation) pulse width and compensate the voltage drop of the power device with the table, thereby minimizing the position error due to the exact estimation of the back-emf at low speed. The suitability of the proposed algorithm is verified through experiment.

A Simple Control Strategy for Balancing the DC-link Voltage of Neutral-Point-Clamped Inverter at Low Modulation Index

  • C.S. Ma;Kim, T.J.;D.W. Kang;D.S. Hyun
    • Journal of Power Electronics
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    • v.3 no.4
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    • pp.205-214
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    • 2003
  • This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.

Analysis of effects of the arc-funace on the power system from the viewpoint of voltage regulation (전압변동 측면에서 본 아크로 부하가 전력계통에 미치는 영향 검토)

  • Park, Hyun-Taek;Kim, Jae-Chul;Park, Kyoung-Ho;Im, Sang-Gug
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.366-369
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    • 2004
  • Arc-furnace is one of the large loads in the electric power system. When the arc-furnace operates, it may cause a bus voltage fluctuation in the power system, because it consumes a lot of reactive power. In this paper, we simulated this phenomenon by using a PSAF program with on-site measured arc-furnace load. The simulated results show that the fluctuation of bus voltage adjacent the arc-furnace was varied from $4.3%{\sim}7.8%$ the normal voltage because of reactive power consumption by arc-furnace. Therefore, we expect this study will come into use as the basic information on the probability of the demand control

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Highly AC Voltage Fluctuation-Resistant LED Driver with Sinusoid-Like Reference

  • Ning, Ning;Tong, Zhenxiao;Yu, Dejun;Wu, Shuangyi;Chen, Wenbin;Feng, Chunyi
    • Journal of Power Electronics
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    • v.14 no.2
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    • pp.257-264
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    • 2014
  • A novel converter-free AC LED driver that is highly resistant to the fluctuation of AC voltage is proposed in this study. By removing large passive components, such as the bulky capacitor and the large-value inductor, the integration of the driver circuit is enhanced while the driving current remains stable. The proposed circuit provides LED lamps with a driving current that can follow the sinusoid waveform to obtain a very high power factor (PF) and low total harmonic distortion (THD). The LED input current produced by this driving current is insensitive to fluctuations in the AC voltage. Users will thus not feel that LED lamps are flashing during the fluctuation. Experiment results indicate that the proposed system can obtain PF of 0.999 and THD as low as 3.3% for a five-string 6 W LED load under 220 V at 50 Hz.

A DC Reference Fluctuation Reduction Circuit for High-Speed CMOS A/D Converter (고속 CMOS A/D 변환기를 위한 기준전압 흔들림 감쇄 회로)

  • Park Sang-Kyu;Hwang Sang-Hoon;Song Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.53-61
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    • 2006
  • In high speed flash type or pipelining type A/D Converter, the faster sampling frequency is, the more the effect of DC reference fluctuation is increased by clock feed-through and kick-back. When we measure A/D Converter, further, external noise increases reference voltage fluctuation. Thus reference fluctuation reduction circuit must be needed in high speed A/D converter. Conventional circuit simply uses capacitor but layout area is large and it's not efficient. In this paper, a reference fluctuation reduction circuit using transmission gate is proposed. In order to verify the proposed technique, we designed and manufactured 6bit 2GSPS CMOS A/D converter. The A/D converter is based on 0.18um 1-poly 5-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies chip area of $977um\times1040um$. Experimental result shows that SNDR is 36.25 dB and INL/DNL ${\pm}0.5LSB$ when sampling frequency is 2GHz.

Advanced Droop Control Scheme in Multi-terminal DC Transmission Systems

  • Che, Yanbo;Zhou, Jinhuan;Li, Wenxun;Zhu, Jiebei;Hong, Chao
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1060-1068
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    • 2018
  • Droop control schemes have been widely employed in the control strategies for Multi-Terminal Direct Current (MTDC) system for its high reliability. Under the conventional DC voltage-active power droop control, the droop slope applies a proportional relationship between DC voltage error and active power error for power sharing. Due to the existence of DC network impedance and renewable resource fluctuation, there is inevitably a DC voltage deviation from the droop characteristic, which in turn results in inaccurate control of converter's power. To tackle this issue, a piecewise droop control with DC voltage dead band or active power dead band is implemented into controller design. Besides, an advanced droop control scheme with versatile function is proposed, which enables the converter to regulate DC voltage and AC voltage, control active and reactive power, get participated into frequency control, and feed passive network. The effectiveness of the proposed control method has been verified by simulation results.

A SVPWM for the Small Fluctuation of Neutral Point Current in Three-level Inverter (중성점 전류 리플을 고려한 3-레벨 인버터의 공간 벡터 펄스폭 변조 기법)

  • 김래영;이요한;현동석
    • Proceedings of the KIPE Conference
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    • 1998.11a
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    • pp.33-37
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    • 1998
  • For the high power variable speed applications, the DCTLI(diode clamped three-level inverter) have been widely used. This paper describes the analysis of the neutral point current of the DCTLI and the improved space vector-based PWM strategy considering the switching frequency of power devices, that minimizes the fluctuation of the neutral point current in spite of high modulation index region and low power factor. It contributes to decrease the capacitance of dc-link capacitor bank and to increase the neutral point voltage controllable region. Especially, even if second (or even) order harmonic is induced in load current (at this situation, is was investigated that the general control method can not suppress the neutral point voltage variation), this PWM can provide effective control method to suppress the neutral point voltage variation. Various simulation results by means of Matlab/Simulation are presented to verify the proposed PWM.

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A Study on the Nano-Lithography using FE-tip (FE-tip을 이용한 Nano-Lithography 기술에 관한 연구)

  • Choi, Je-Hyuk;Park, Sun-Woo;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1999.11d
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    • pp.1160-1163
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    • 1999
  • In this study, we developed FE-tip lithography system that could apply to multi-tip system and did lithography using FE-tip. The software that control FE-tip lithography system, was proposed for acquiring more adaptive data to compensate the effect of fluctuation. We found that the fluctuation effect was reduced. The minimum line width was related to applied voltage and we observed a movement of Z-axis piezo stage to correct the error of this system. When FE current was 5nA, scanning speed was $3{\mu}m/sec$ and applied voltage was 200V, we made a line pattern which had minimum line width of 614 nm. If we reduce applied voltage to several decades and increase scanning speed to $20{\mu}m/sec$, it is possible to set the minimum line width of 100 nm. The proposed system can be easily applied to multi FE-tip lithography system.

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