• Title/Summary/Keyword: Variable Capacitor

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A study of guaranteeing reliability for IC of electronic instruments according temperature

  • Yoon, Geon;Park, Yong-Oon;Kwon, Soon-Chang
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.320-323
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    • 2005
  • This paper discusses heat problem of IC, which composes the electronic instruments, to guarantee reliability of electronic instruments. And also proposes the unified equivalent model for various electronic instrument products to guarantee reliability and life of its parts. Because electronic instruments are down sizing and operated with high frequency, the internal temperature of electronic instruments is rising steadily. The internal temperature of the electronic instruments gives a big effect to electronic instrument's reliability and life. The semiconductor parts are the representative heat generation parts because of its complicated function, high frequency and high density. Consequently, guaranteeing reliability and life of electronic semiconductor is the important start point in securing the reliability and life of the electronic instrument product. Unfortunately, there are many factors, which affect heat dissipation efficiency. The heat dissipation efficiency follows the environment where the electronic instrument products are used. Therefore it is very difficult to define reliability and life of the electronic manufactures. Electronic instrument products are composed of printed circuit board (PCB), integrated circuit (IC), resistance, and capacitor and so on. And there are superposed thermal resistances, because the parts are arrayed on the printed circuit board (PCB), Therefore the total thermal resistance is variable. Consequently it cannot have same thermal model for each electronic instrument products. In the next part, we propose the unified equivalent model for various electronic instruments. And using the proposed equivalent model proofs the method for analysis reliability of electronic parts.

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Mouse Somatosensory Cortex Stimulation Using Pulse Modulated Transcranial Magnetic Stimulation (구형파 변조된 경두개 자기자극을 이용한 쥐의 감각피질 자극실험)

  • Sun, Sukkyu;Seo, Taeyoon;Huh, Yeowool;Cho, Jeiwon;Kwon, Youngwoo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.5
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    • pp.482-485
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    • 2016
  • In this work, a transcranial magnetic stimulation(TMS) experiment on animals is performed to stimulate the brain cortex of the mouse using modulated signals. The proposed TMS system is composed of the inverter, transformer, capacitor, variable inductor, and stimulation coil to generate 1.5 mT magnetic field in the brain cortex of the mouse. The stimulation signal is modulated to square wave where the carrier frequency is swept from 85 to 91 kHz to investigate the stimulation effect. The experimental result shows that when the carrier frequency of the stimulation signal is lower than 89 kHz, the reaction of the mouse does not change while the stimulation signal which has the carrier frequency higher than 89 kHz results in decreasing the threshold of the stimulus for the pressure.

A Reconfigurable Spatial Moving Average Filter in Sampler-Based Discrete-Time Receiver (샘플러 기반의 수신기를 위한 재구성 가능한 이산시간 공간상 이동평균 필터)

  • Cho, Yong-Ho;Shin, Soo-Hwan;Kweon, Soon-Jae;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.169-177
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    • 2012
  • A non-decimation second-order spatial moving average (SMA) discrete-time (DT) filter is proposed with reconfigurable null frequencies. The filter coefficients are changeable, and it can be controlled by switching sampling capacitors. So, interferers can be rejected effectively by flexible nulls. Since it operates without decimation, it does not change the sample rate and aliasing problem can be avoided. The filter is designed with variable weight of coefficients as $1:{\alpha}:1$ where ${\alpha}$ varies from 1 to 2. This corresponds to the change of null frequencies within the range of fs/3~fs/2 and fs/2~2fs/3. The proposed filter is implemented in the TSMC 0.18-${\mu}m$ CMOS process. Simulation shows that null frequencies are changeable in the range of 0.38~0.49fs and 0.51~0.62fs.

Analysis and Implementation of a Half Bridge Class-DE Rectifier for Front-End ZVS Push-Pull Resonant Converters

  • Ekkaravarodome, Chainarin;Jirasereeamornkul, Kamon
    • Journal of Power Electronics
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    • v.13 no.4
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    • pp.626-635
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    • 2013
  • An analysis of the junction capacitance in resonant rectifiers which has a significant impact on the operating point of resonance circuits is studied in this paper, where the junction capacitance of the rectifier diode is to decrease the resonant current and output voltage in the circuit when compared with that in an ideal rectifier diode. This can be represented by a simplified series resonant equivalent circuit and a voltage transfer function versus the normalized operating frequency at varied values of the resonant capacitor. A low voltage to high voltage push-pull DC/DC resonant converter was used as a design example. The design procedure is based on the principle of the half bridge class-DE resonant rectifier, which ensures more accurate results. The proposed scheme provides a more systematic and feasible solution than the conventional resonant push-pull DC/DC converter analysis methodology. To increase circuit efficiency, the main switches and the rectifier diodes can be operated under the zero-voltage and zero-current switching conditions, respectively. In order to achieve this objective, the parameters of the DC/DC converter need to be designed properly. The details of the analysis and design of this DC/DC converter's components are described. A prototype was constructed with a 62-88 kHz variable switching frequency, a 12 $V_{DC}$ input voltage, a 380 $V_{DC}$ output voltage, and a rated output power of 150 W. The validity of this approach was confirmed by simulation and experimental results.

Electrical modelling for thermal behavior and gas response of combustible catalytic sensor (접촉연소식 센서의 열 특성 및 가스반응의 모델링)

  • Lee, Sang-Mun;Song, Kap-Duk;Joo, Byung-Su;Lee, Yun-Su;Lee, Duk-Dong
    • Journal of Sensor Science and Technology
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    • v.15 no.1
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    • pp.34-39
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    • 2006
  • This study provides the electrical model of combustible catalytic gas sensor. Physical characteristics such as thermal behavior, resistance change were included in this model. The finite element method analysis for sensor device structure showed that the thermal behavior of sensor is expressed in a simple electrical equivalent circuit that consists of a resistor, a capacitor and a current source. This thermal equivalent circuit interfaces with real electrical circuit using two parts. One is 'power to heat' converter. The other is temperature dependent variable resistor. These parts realized with the analog behavior devices of the SPICE library. The gas response tendency was represented from the mass transferring limitation theory and the combustion theory. In this model, Gas concentration that is expressed in voltage at the model, is converted to heat and is flowed to the thermal equivalent circuit. This model is tested in several circuit simulations. The resistance change of device, the delay time due to thermal capacity, the gas responses output voltage that are calculated from SPICE simulations correspond well to real results from measuring in electrical circuits. Also good simulation result can be produced in the more complicated circuit that includes amplifier, bios circiut, buffer part.

The Optimization and Numerical Analysis of The Antenna Circuit for Antenna Design With 13.56MHz As Transmitting Wireless Power (무선전력 전송용 13.56MHz의 안테나 설계를 위한 안테나 회로의 최적화 및 수치적 해석)

  • Chung, Sung-In;Lee, Seung-Min;Lee, Hug-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.10
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    • pp.57-62
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    • 2009
  • This study proposes the optimization and numerical analysis of the antenna circuit for antenna design with 13.56 MHz as transmitting wireless power, for calculating the dose radiation exposure to the real time. The 13.56 MHz of the antenna frequency bands is used to the loop antenna which is a induced current for transmitting the power with wireless the reader to the tag. The study compared to the real measurement value as calculating the value of the inductance and capacitance through the numerical analysis for the antenna LC resonance using the theory of the electromagnetic induction method. We tried to search for the resonance point as the voltages of both sides of antenna coil by the scope measures of the peak point, as we tried to be variable the resonance capacitor for the optimization tuning of the antenna circuit and the matching of the antenna port. We convince our research contributes to help the design and application technology of the wireless power transmit system which is received power supply with wireless.

Design and Implementation of PIC/FLC plus SMC for Positive Output Elementary Super Lift Luo Converter working in Discontinuous Conduction Mode

  • Muthukaruppasamy, S.;Abudhahir, A.;Saravanan, A. Gnana;Gnanavadivel, J.;Duraipandy, P.
    • Journal of Electrical Engineering and Technology
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    • v.13 no.5
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    • pp.1886-1900
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    • 2018
  • This paper proposes a confronting feedback control structure and controllers for positive output elementary super lift Luo converters (POESLLCs) working in discontinuous conduction mode (DCM). The POESLLC offers the merits like high voltage transfer gain, good efficiency, and minimized coil current and capacitor voltage ripples. The POESLLC working in DCM holds the value of not having right half pole zero (RHPZ) in their control to output transfer function unlike continuous conduction mode (CCM). Also the DCM bestows superlative dynamic response, eliminates the reverse recovery troubles of diode and retains the stability. The proposed control structure involves two controllers respectively to control the voltage (outer) loop and the current (inner) loop to confront the time-varying ON/OFF characteristics of variable structured systems (VSSs) like POESLLC. This study involves two different combination of feedback controllers viz. the proportional integral controller (PIC) plus sliding mode controller (SMC) and the fuzzy logic controller (FLC) plus SMC. The state space averaging modeling of POESLLC in DCM is reviewed first, then design of PIC, FLC and SMC are detailed. The performance of developed controller combinations is studied at different working states of the POESLLC system by MATLAB-Simulink implementation. Further the experimental corroboration is done through implementation of the developed controllers in PIC 16F877A processor. The prototype uses IRF250 MOSFET, IR2110 driver and UF5408 diodes. The results reassured the proficiency of designed FLC plus SMC combination over its counterpart PIC plus SMC.

PWM-based Integral Sliding-mode Controller for Unity Input Power Factor Operation of Indirect Matrix Converter

  • Rmili, Lazhar;Hamouda, Mahmoud;Rahmani, Salem;Blanchette, Handy Fortin;Al-Haddad, Kamal
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.1048-1057
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    • 2017
  • An indirect matrix converter (IMC) is a modern power generation system that enables a direct ac/ac conversion without the need for any bulky and limited lifetime electrolytic capacitor. This system also allows four-quadrant operation, generation of sinusoidal output voltage waveforms with variable frequency and amplitude, and control of input power factor. This study proposes a pulse-width modulation-based sliding-mode controller to achieve unity input-power factor operation of the IMC independently of the active power exchanged with the grid, as well as a fast dynamic response. The designed equivalent control law determines, at each sampling period, the appropriate q-axis component of the modulated input current to be injected into the grid through the LC input filter. An integral term of the error is included in the expression of the sliding surface to increase the accuracy of the control method. A double space vector modulation method is used to synthesize the direction of the space vector of the input currents as required by the sliding-mode controller and the space vectors of the target output voltages. Simulation and experimental results are provided to show the effectiveness and evaluate the performance of the proposed control method.

Mode Control Design of Dual Buck Converter Using Variable Frequency to Voltage Converter (주파수 전압 변환을 이용한 듀얼 모드 벅 변환기 모드 제어 설계)

  • Lee, Tae-Heon;Kim, Jong-Gu;So, Jin-Woo;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.42 no.4
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    • pp.864-870
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    • 2017
  • This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

Design of Low Power 4th order ΣΔ Modulator with Single Reconfigurable Amplifier (재구성가능 연산증폭기를 사용한 저전력 4차 델타-시그마 변조기 설계)

  • Sung, Jae-Hyeon;Lee, Dong-Hyun;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.5
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    • pp.24-32
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    • 2017
  • In this paper, a low power 4th order delta-sigma modulator was designed with a high resolution of 12 bits or more for the biological signal processing. Using time-interleaving technique, 4th order delta-sigma modulator was designed with one operational amplifier. So power consumption can be reduced to 1/4 than a conventional structure. To operate stably in the big difference between the two capacitor for kT/C noise and chip size, the variable-stage amplifier was designed. In the first phase and second phase, the operational amplifier is operating in a 2-stage. In the third and fourth phase, the operational amplifier is operating in a 1-stage. This was significantly improved the stability of the modulator because the phase margin exists within 60~90deg. The proposed delta-sigma modulator is designed in a standard $0.18{\mu}m$ CMOS n-well 1 poly 6 Metal technology and dissipates the power of $354{\mu}W$ with supply voltage of 1.8V. The ENOB of 11.8bit and SNDR of 72.8dB at 250Hz input frequency and 256kHz sampling frequency. From measurement results FOM1 is calculated to 49.6pJ/step and FOM2 is calculated to 154.5dB.