1 |
S. H. Yang, J. H. Choi, G. S. Yoon, "A Design of Reconfigurable 4th Order delta-sigma Modulator Using Two Op-amps Journal," Journal of The Institute of Electronics and Information Engineers, vol. 52, No. 5, pp. 875-881, May. 2015.
|
2 |
Y. Chae and G. Han, "Low voltage, low power, inverter-based switched-capacitor delta-sigma modulator," IEEE J. Solid-State circuits, vol. 44, no. 2, pp. 458-472, Feb. 2009.
DOI
|
3 |
Y. Chae, J. Cheon, S. Lim, M. Kwon, K. Yoo, W. Jung, D. Lee, S. Ham, and G. Han, "A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel ADC Architecture," IEEE J. Solid-State Circuits, vol. 46, no. 1, pp. 236-247, Jan. 2011.
DOI
|
4 |
S. Richards and G. C. Temes, "Understanding Delta Sigma data converters," Wiley Interscience, 2005.
|
5 |
A. Pugliese, Francesco A. Amoroso, G. Cappuccino, G. Cocorullo, "Analysis of op-amp phase margin impact on SC delta-sigma modulator performance", Microelectronics Journal, vol. 41, pp. 440-446, 2010.
DOI
|
6 |
A. P. Perez, E. Bonizzoni, and F. Maloberti, "A 88-dB DR, 84-dB SNDR very low-power single op-amp third-order modulator," IEEE, J. Solid-State Circuits, Vol. 47, No. 9 pp. 2017-2118, Sep. 2012.
|
7 |
F. Michel and M. S. J. Steyaert, "A 250mV 61dB SNDR SC delta-sigma modulator using near-threshold-voltage-biased inverter amplifiers in 130nm CMOS," IEEE Journal of Solid-State Circuits, vol. 47, No. 3, pp. 709-721, Mar. 2012.
DOI
|
8 |
Yamamoto, J. and Carusone, A.C. "A 1-1-1-1 MASH Delta-Sigma Modulator With Dynamic Comparator-Based OTAs," IEEE J. Solid-State Circuits, vol. 47, no. 1, pp. 1866-1883, Aug. 2012.
DOI
|
9 |
A. Ismail and I. Mostafa, "A Process-Tolerant, Low-Voltage, Inverter-Based OTA for Continuous-Time Delta-Sigma ADC", IEEE Transactions on Very Large Scale Integration Systems, vol. 24, pp. 2911-2917, 2016.
DOI
|