• Title/Summary/Keyword: UWB LNA

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A MB-OFDM UWB 0.18-μm CMOS RF Front-End Receiver

  • Kim, Chang-Wan
    • Journal of electromagnetic engineering and science
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    • v.8 no.1
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    • pp.34-39
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    • 2008
  • An RF front-end dual-conversion receiver for $3{\sim}5\;GHz$ MB-OFDM UWB systems is implemented in $0.18\;{\mu}m$ CMOS technology. The receiver includes a two-stage UWB LNA, an RF mixer, an IF I/Q mixer, and a frequency synthesizer. The proposed receiver adopts the dual-conversion architecture to mitigate the burden of design of the frequency synthesizer. Accordingly, the proposed frequency synthesizer generates four LO tones from only one VCO. The receiver front-end achieves power gain of 16.3 to 21 dB, NF of 7 to 7.6 dB over $3{\sim}5\;GHz$, and IIP3 of -21 dBm, while consuming 190 mW from a 1.8 V supply.

Propagation Characteristics of GIS PD Signals by Dual UHF Band Method (2)

  • Choi, Jae-Gu;Yi, Sang-Hwa;Kim, Kwang-Hwa
    • Proceedings of the KIEE Conference
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    • 2004.05b
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    • pp.136-139
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    • 2004
  • It is widely known that the ultra high frequency (UHF) method that detects the electromagnetic wave of the PD pulses in the gas insulated space is one of the most competitive methods for its high sensitivity. From the above point of view, this paper describes the propagation characteristics of GIS PD signals measured with ultra wide band (UWB) GIS PD detecting system in which PD signals are detected into the dual UHF band. The UWB PD detection system consists of the UWB UHF coupler, the UWB low noise amplifier (LNA) and the oscilloscope. The dual bands for PD signals are 0.5-2GHz(full band) and 1-2GHz(high band). As results, propagation characteristics of GIS PD signals were measured in the mock-up GIS bus and it was found that the propagation characteristics of the high band showed a better result in accordance with the infernal configuration of the GIS bus than those of the full band.

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A 3 ~ 5 GHz CMOS UWB Radar Chip for Surveillance and Biometric Applications

  • Lee, Seung-Jun;Ha, Jong-Ok;Jung, Seung-Hwan;Yoo, Hyun-Jin;Chun, Young-Hoon;Kim, Wan-Sik;Lee, Noh-Bok;Eo, Yun-Seong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.238-246
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    • 2011
  • A 3-5 GHz UWB radar chip in 0.13 ${\mu}m$ CMOS process is presented in this paper. The UWB radar transceiver for surveillance and biometric applications adopts the equivalent time sampling architecture and 4-channel time interleaved samplers to relax the impractical sampling frequency and enhance the overall scanning time. The RF front end (RFFE) includes the wideband LNA and 4-way RF power splitter, and the analog signal processing part consists of the high speed track & hold (T&H) / sample & hold (S&H) and integrator. The interleaved timing clocks are generated using a delay locked loop. The UWB transmitter employs the digitally synthesized topology. The measured NF of RFFE is 9.5 dB in 3-5 GHz. And DLL timing resolution is 50 ps. The measured spectrum of UWB transmitter shows the center frequency within 3-5 GHz satisfying the FCC spectrum mask. The power consumption of receiver and transmitter are 106.5 mW and 57 mW at 1.5 V supply, respectively.

A CMOS Impulse Radio Ultra-Wideband Receiver for Inner/Inter-chip Wireless Interconnection

  • Nguyen, Chi Nhan;Duong, Hoai Nghia;Dinh, Van Anh
    • Journal of IKEEE
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    • v.17 no.2
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    • pp.176-181
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    • 2013
  • This paper presents a CMOS impulse radio ultra-wideband (IR-UWB) receiver implemented using IBM 0.13um CMOS technology for inner/inter-chip wireless interconnection. The IR-UWB receiver is based on the non-coherent architecture which removes the complexity of RF architecture (such as DLL or PLL) and reduces power consumption. The receiver consists of three blocks: a low noise amplifier (LNA) with active balun, a correlator, and a comparator. Simulation results show the die area of the IR-UWB receiver of 0.2mm2, a power gain (S21) of 12.5dB, a noise figure (NF) of 3.05dB, an input return loss (S11) of less than -16.5dB, a conversion gain of 18dB, a NFDSB of 22. The receiver exhibits a third order intercept point (IIP3) of -1.3dBm and consumes 22.9mW of power on the 1.4V power supply.

An Ultra Wideband Low Noise Amplifier in 0.18 μm RF CMOS Technology

  • Jung Ji-Hak;Yun Tae-Yeoul;Choi Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.5 no.3
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    • pp.112-116
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    • 2005
  • This paper presents a broadband two-stage low noise amplifier(LNA) operating from 3 to 10 GHz, designed with 0.18 ${\mu}m$ RF CMOS technology, The cascode feedback topology and broadband matching technique are used to achieve broadband performance and input/output matching characteristics. The proposed UWB LNA results in the low noise figure(NF) of 3.4 dB, input/output return loss($S_{11}/S_{22}$) of lower than -10 dB, and power gain of 14.5 dB with gain flatness of $\pm$1 -dB within the required bandwidth. The input-referred third-order intercept point($IIP_3$) and the input-referred 1-dB compression point($P_{ldB}$) are -7 dBm and -17 dBm, respectively.

A 3.1 to 5 GHz CMOS Transceiver for DS-UWB Systems

  • Park, Bong-Hyuk;Lee, Kyung-Ai;Hong, Song-Cheol;Choi, Sang-Sung
    • ETRI Journal
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    • v.29 no.4
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    • pp.421-429
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    • 2007
  • This paper presents a direct-conversion CMOS transceiver for fully digital DS-UWB systems. The transceiver includes all of the radio building blocks, such as a T/R switch, a low noise amplifier, an I/Q demodulator, a low pass filter, a variable gain amplifier as a receiver, the same receiver blocks as a transmitter including a phase-locked loop (PLL), and a voltage controlled oscillator (VCO). A single-ended-to-differential converter is implemented in the down-conversion mixer and a differential-to-single-ended converter is implemented in the driver amplifier stage. The chip is fabricated on a 9.0 $mm^2$ die using standard 0.18 ${\mu}m$ CMOS technology and a 64-pin MicroLead Frame package. Experimental results show the total current consumption is 143 mA including the PLL and VCO. The chip has a 3.5 dB receiver gain flatness at the 660 MHz bandwidth. These results indicate that the architecture and circuits are adaptable to the implementation of a wideband, low-power, and high-speed wireless personal area network.

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Design of UWB CMOS Low Noise Amplifier Using Inductor Peaking Technique (인덕터 피킹기법을 이용한 초광대역 CMOS 저잡음 증폭기 설계)

  • Sung, Young-Kyu;Yoon, Kyung-Sik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.158-165
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    • 2013
  • In this paper, a new circuit topology of an ultra-wideband (UWB) 3.1-10.6GHz CMOS low noise amplifier is presented. The proposed UWB low noise amplifier is designed utilizing RC feedback and LC filter networks which can provide good input impedance matching. In this design, the current-reused topology is adopted to reduce the power consumption and the inductor-peaking technique is applied for the purpose of bandwidth extension. The performance results of this UWB low noise amplifier simulated in $0.18-{\mu}m$ CMOS process technology exhibit a power gain of 14-14.9dB, an input matching of better than -10.8dB, gain flatness of 0.9dB, and a noise figure of 2.7-3.3dB in the frequency range of 3.1-10.6GHz. In addition, the input IP3 is -5dBm and the power consumption is 12.5mW.

A Design of Ultra Wide Band Single-to-Differential Gain Controlled Low Noise Amplifier Using 0.18 um CMOS (0.18 um CMOS 공정을 이용한 UWB 단일 입력-차동 출력 이득 제어 저잡음 증폭기 설계)

  • Jeong, Moo-Il;Choi, Yong-Yeol;Lee, Chang-Suk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.3
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    • pp.358-365
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    • 2008
  • A differential-gain-controlled LNA is designed and implemented in 0.18 um CMOS technology for $3.1{\sim}4.8GHz$ UWB system. In high gain mode, measurements show a differential power gain of $14.1{\sim}15.8dB,\;13.3{\sim}15dB$, respectably, an input return loss higher then 10dB, an input IP3 of -19.3 dBm, a noise figure of $4.85{\sim}5.09dB$, while consuming only 19.8 mW of power from a 1.8V DC supply. In low gain mode, measurements show a differential power gain of $-6.1{\sim}-4.2dB,\;-7.6{\sim}-5.6dB$, respectably, an input return loss higher then 10dB, an input IP3 of -1.45 dBm, a noise figure of $8.8{\sim}10.3dB$, while consuming only 5.4mW of power from a 1.8V DC supply.

Design of Ultra Wide-Band CMOS Low Noise Amplifier (광대역 CMOS 저잡음 증폭기 설계)

  • Moon Jeong-Ho;Jeong Moo-Il;Kim Yu-Sin;Lee Kwang-Du;Park Sang-Gyu;Han Sang-Min;Kim Young-Hwan;Lee Chang-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.6 s.109
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    • pp.597-604
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    • 2006
  • An ultrawideband(UWB) $3.1{\sim}5.15$ GHz low-noise amplifier employing a novel input matching circuit and feedback topology are presented. The proposed UWB amplifier is Implemented in $0.18{\mu}m$ RF CMOS technology. Measurements show a NF of $3.4{\sim}3.9$ dB, a power gain of $12.8{\sim}14$ dB, better than -9.4 of input matching and, an input IP3 of -1 dBm, while comsuming only 14.5 mW of power.

GISPD Measurement Using UHFPD Measurement System (UHFPD측정시스템을 이용한 GISPD측정)

  • Choi, Jae-Gu;Yi, Sang-Hwa;Kim, Kwang-Hwa
    • Proceedings of the KIEE Conference
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    • 2004.07c
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    • pp.1857-1859
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    • 2004
  • It is widely known that the ultra high frequency (UHF) method that detects the electromagnetic wave of the PD pulses in the gas insulated space is one of the most competitive methods for its high sensitivity. From the above point of view, this paper describes the noise suppression methods and the PD measurement results of the in-service substation by the developed UHF PD measurement system which consists of the external UHF coupler, the UWB LNA and the digital storage oscilloscope. As results, it was found that the effect of the noise suppression methods were verified and that the developed external UHF coupler showed a better detection sensitivity than a conventional external coupler.

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