• 대한전자공학회논문지
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• 제12권4호
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• pp.35-40
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• 1975

ZnTe-lnSb Heterojunction을 계면합금법으로 제작했다. Insb의 In이 ZnTe결정에 확산되어 계면에 고저항 ZnTe충을 성장시켜 P-i-n구조를 갖고 있으며 전류수송기구는 p형 ZnTe 가전자대로부터 고저항 ZnTe충에 주입된 Hole의 SCLC기구에 의존된다. 순방향과 역방향 전압을 인가할때 실온에서 오런지색 전 장발장이 관측되었다. The Zn7e-lnSb heterojunctions was prepared by interface alloying technique. The structure of this beterojunction had p-i-n which semi-insulating ZnTe laver at interface of this heterojunction was formed by diffusing In of InSb into ZnTe crystal. The current transport mechanism of this heterojunction was Spacecharge-Limited-Current(SCLC) mechanism by hole at semi-insulating ZnTe layer. The hole wart injected from valence band of p- type SnTe crystal. Orange color electroluminescence was observed at this heterojunction when forward and reversed bias voltage applied.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.1332_1333
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• 2009

The electrical properties of an inorganic/organic heterojunction has been investigated by spin coating the p-type polymer poly(3,4 ethylenedioxythiophene) : poly(styrenesulfonate) (PEDOT:PSS) on an n-type gallium doping zinc oxide (GZO) film. Current-voltage (I-V) characteristics of the fabricated heterojunction diodes have a good rectifying characteristics. The barrier height is calculated 0.8 eV.

• 한국전기전자재료학회논문지
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• 제28권8호
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• pp.481-485
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• 2015

We investigated the effects of annealing on the electrical and thermal properties of ZTO/4H-SiC heterojunction diodes. A ZTO thin film layer was grown on p-type 4H-SiC substrate by using solution process. The ZTO/SiC heterojunction structures annealed at $500^{\circ}C$ show that $I_{on}/I_{off}$ increases from ${\sim}5.13{\times}10^7$ to ${\sim}1.11{\times}10^9$ owing to the increased electron concentration of ZTO layer as confirmed by capacitance-voltage characteristics. In addition, the electrical characterization of ZTO/SiC heterojunction has been carried out in the temperature range of 300~500 K. When the measurement temperature increased from 300 K to 500 K, the reverse current variation of annealed device is higher than as-grown device, which is related to barrier height in the ZTO/SiC interface. It is shown that annealing process is possible to control the electrical characteristics of ZTO/SiC heterojunction diode.

• Journal of Photoscience
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• 제3권3호
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• pp.159-161
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• 1996

Photosensitivity of silver halide emulsion depends on the properties of the microcrystals. Size, shape, grain distribution and chemical composition as well as the inner structure or the topography of the latent image specks affect on the optical properties and play an important role in the photographic process. In the present paper, a study on the sensitization of emulsion containing AgBrClI core/shell grains showed that for the given size, shape, halide content and crystal habit, under the optimal conditions the photosensitivity of the heterojunction type grains are different from that of the common regular grains. The optimal photosensitivity was obtained at the iodide content of 2.0 mo1%.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권3호
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• pp.182-189
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• 2011

In this work, a tunneling field-effect transistor (TFET) based on heterojunctions of compound and Group IV semiconductors is introduced and simulated. TFETs based on either silicon or compound semiconductors have been intensively researched due to their merits of robustness against short channel effects (SCEs) and excellent subthreshold swing (SS) characteristics. However, silicon TFETs have the drawback of low on-current and compound ones are difficult to integrate with silicon CMOS circuits. In order to combine the high tunneling efficiency of narrow bandgap material TFETs and the high mobility of III-V TFETs, a Type-I heterojunction tunneling field-effect transistor (I-HTFET) adopting $Ge-Al_xGa_{1-x}As-Ge$ system has been optimized by simulation in terms of aluminum (Al) composition. To maximize device performance, we considered a nanowire structure, and it was shown that high performance (HP) logic technology can be achieved by the proposed device. The optimum Al composition turned out to be around 20% (x=0.2).

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2011년도 춘계학술대회 초록집
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• pp.103.1-103.1
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• 2011

실리콘 이종접합 태양전지에서 계면 결함 밀도는 효율을 결정하는데 가장 중요한 요인으로 작용한다. 계면 결함은 캐리어의 재결합 위치로 작용하여, 계면 결함 밀도가 증가하면 재결합 속도가 증가하게 된다. 흡수층으로 사용되는 실리콘 웨이퍼 (결정질 실리콘)를 가능한 깨끗하게 세정함으로써, 또한 emitter로 쓰이는 비정질 실리콘을 낮은 데미지로 증착하여 계면 결함 밀도를 감소 시킬 수 있다. 이러한 계면 결함 밀도의 감소가 어떠한 변화로 인해 태양전지 특성에 영향을 주는지 시물레이션을 통해 알아보았다. n-type 웨이퍼에 p-type 비정질 실리콘을 emitter로 하여 TCO/p/i/n-type wafer/i/n/TCO/metal의 구조를 적용했고, wafer 전면과 i로 쓰인 무첨가된 비정질 실리콘 간의 계면 결함 밀도를 변수로 적용했다. 그 결과, 계면 결함 밀도가 감소함에 따라 재결합이 감소하여 태양전지 특성이 증가하는 측면도 있지만, 흡수층의 장벽 (barrier height)이 높아져 재결합을 더욱 감소시킴으로 인해 태양전지 특성이 증가함을 알 수 있었다.

• 한국재료학회지
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• 제21권2호
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• pp.120-124
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• 2011

Silicon heterojunction solar cells have been studied by many research groups. In this work, silicon heterojunction solar cells having a simple structure of Ag/ZnO:Al/n type a-Si:H/p type c-Si/Al were fabricated. Samples were fabricated to investigate the effect of transparent conductive oxide growth conditions on the interface between ZnO:Al layer and a-Si:H layer. One sample was deposited by ZnO:Al at low working pressure. The other sample was deposited by ZnO:Al at alternating high working pressure and low working pressure. Electrical properties and chemical properties were investigated by light I-V characteristics and AES method, respectively. The light I-V characteristics showed better efficiency on sample deposited by ZnO:Al by alternating high working pressure and low working pressure. Atomic concentrations and relative oxidation states of Si, O, and Zn were analyzed by AES method. For poor efficiency samples, Si was diffused into ZnO:Al layer and O was diffused at the interface of ZnO:Al and Si. Differentiated O KLL spectra, Zn LMM spectra, and Si KLL spectra were used for interface reaction and oxidation state. According to AES spectra, sample deposited by high working pressure was effective at reducing the interface reaction and the Si diffusion. Consequently, the efficiency was improved by suppressing the SiOx formation at the interface.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권1호
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• pp.51-54
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• 2009

Transparent Cuprous oxide film was deposited by rapid thermal oxidation (RTO) of Cu at $500^{\circ}C$/45s condition on textured single-crystal n-Si substrate to form $Cu_2O$/n-Si heterojunction photodiode. The Hall effect measurements for the $Cu_2O$ films showed a p-type conductivity. The photovoltaic and electrical properties of the junction at room temperature were investigated without any post-deposition annealing. I-V characteristics revealed that the junction has good rectifying properties. The C-V data showed abrupt junction and a built-in potential of 1 V. The photodiode showed good stability and high responsivity in the visible at three regions; 525 nm, 625-700 nm, and 750nm denoted as regions A, B, and C, respectively.

• Current Applied Physics
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• 제18권12호
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• pp.1496-1506
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• 2018

Organic/inorganic ultraviolet photodetector was fabricated using thermal evaporation technique. Organic/inorganic heterojunction based on thermally evaporated copper (II) acetylacetonate thin film of thickness 200 nm deposited on an n-type silicon substrate is introduced. I-V characteristics of the fabricated heterojunction were investigated under UV illumination of intensity $65mW/cm^2$. The diode parameters such as ideality factor, n, barrier height, ${\Phi}_B$, and reverse saturation current, $I_s$, were determined using thermionic emission theory. The series resistance of the fabricated diode was determined using modified Nord's method. The estimated values of series resistance and barrier height of the diode were about $0.33K{\Omega}$ and 0.72 eV, respectively. The fabricated photodetector exhibited a responsivity and specific detectivity about 9 mA/W and $4.6{\times}10^9$ Jones, respectively. The response behavior of the fabricated photodetector was analyzed through ON-OFF switching behavior. The estimated values of rise and fall time of the present architecture under UV illumination were about 199 ms and 154 ms, respectively. Finally, enhancing the photoresponsivity of the fabricated photodetector, post-deposition plasma treatment process was employed. A remarkable modification of the device performance was noticed as a result of plasma treatment. These modifications are representative in a decrease of series resistance and an increase of photoresponsivity and specific detectivity. The process of plasma treatment achieved an increment of external quantum efficiency from 5.53% to 8.34% at -3.5 V under UV illumination.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1654-1659
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• 2014

Tunneling field-effect transistors (TFETs) are very applicable to low standby-power application by their virtues of low off-current ($I_{off}$) and small subthreshold swing (S). However, low on-current ($I_{on}$) of silicon-based TFETs has been pointed out as a drawback. To improve $I_{on}$ of TFET, a gate-all-around (GAA) TFET based on III-V compound semiconductor with InAs/InGaAs/InP multiple-heterojunction structure is proposed and investigated. Its performances have been evaluated with the gallium (Ga) composition (x) for $In_{1-x}Ga_xAs$ in the channel region. According to the simulation results for $I_{on}$, $I_{off}$, S, and on/off current ratio ($I_{on}/I_{off}$), the device adopting $In_{0.53}Ga_{0.47}As$ channel showed the optimum direct-current (DC) performance, as a result of controlling the Ga fraction. By introducing an n-type InGaAs thin layer near the source end, improved DC characteristics and radio-frequency (RF) performances were obtained due to boosted band-to-band (BTB) tunneling efficiency.