• Journal for History of Mathematics
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• v.21 no.1
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• pp.29-44
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• 2008

Fuzzy logic is introduced by Zadeh in 1965. It has been continuously developed by many mathematicians and knowledge engineers all over the world. A lot of papers concerning with the history of mathematics and the mathematical education related with fuzzy logic, but there is no paper concerning with Zadeh. In this article, we investigate his life and papers about fuzzy logic. We also compare two-valued logic, three-valued logic, fuzzy logic, intuisionistic logic and intuitionistic fuzzy sets. Finally we discuss about the expression of intuitionistic fuzzy sets.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2008.04a
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• pp.311-312
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• 2008

Fuzzy logic is introduced by Zadeh in 1965. It has been continuously developed by many mathematicians and knowledge engineers all over the world. A lot of papers concerning with the history of mathematics and the mathematical education related with fuzzy logic, but there is no paper concerning with Zadeh. In this article, we investigate his life and papers about fuzzy logic. We also compare two-valued logic, three-valued logic, fuzzy logic, intuisionistic logic and intuitionistic fuzzy sets. Finally we discuss about the expression of intuitionistic fuzzy sets.

• Korean Journal of Logic
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• v.18 no.1
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• pp.65-83
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• 2015

This paper deals with non-algebraic Kripke-style semantics for three-valued paraconsistent logic: set-theoretical Kripke-style semantics. We first recall two three-valued paraconsistent systems. We next introduce set-theoretical Kripke-style semantics for them.

• Korean Journal of Logic
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• v.17 no.3
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• pp.441-461
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• 2014

This paper deals with one sort of Kripke-style semantics for three-valued paraconsistent logic: algebraic Kripke-style semantics. We first introduce two three-valued systems, define their corresponding algebraic structures, and give algebraic completeness results for them. Next, we introduce algebraic Kripke-style semantics for them, and then connect them with algebraic semantics.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.5
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• pp.411-421
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• 1988

This paper offers a method to design CCD four-valued circuits using the tabular method. First, the four-valued logic function is decomposed by hand-calculation or computer program. Nest, the algorithm is derived form the tabular method based on the decomposition process to realize the DDC four-valued circuit. According to this algorithm, the two-variable four valued logic function is decomposed and realized by CCD network with four basic gates. The synthesis method in this paper proves that the number of devices and cost is considerably reduces as compared with the existing methods to realize the same logic functions.

• Journal of the Korea Computer Industry Society
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• v.3 no.1
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• pp.57-66
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast Fourier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi-valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like ［0,1,2,3］. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used as LUT(Look Up Table) Finally, for the compatibility with the binary system, multiple-valued hybrid-type FFT processor was proposed and designed using binary-four valued encoder, four-binary valued decoder, and the electric current mode CMOS circuit.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.6
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• pp.589-594
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• 1992

This paper offers the simplification method of Multiple-Valued logic function based on M-AND,M-OR, NOT operation presented by Lukasiewicz. First in performing the simplification the result is different by the method to arrange Cube, the method to find the most effective adjacent term if, most of all, important in simplification. According to this method, the two-variable multiple-valued logic function given by truth table is decomposed. The simplification method in this paper proves that the number of devices and cost is considerably reduced comparing with the existing method 141 to realize the same logic functions.

• Korean Journal of Logic
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• v.7 no.2
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• pp.105-120
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• 2004

In this paper, we provide Routley-Meyer semantics for the many-valued logics ${\L}C$ and LC, and give completeness for each of them. This result shows the following two: 1) Routley-Meyer semantics is very powerful in the sense that it can be used as the semantics for several sorts of logics, i.e., many-valued logic, not merely relevance logic and substructural logic. Note that each implication of ${\L}C$ and LC does not (partially) result in "paradoxes of material implication" 2) This implies that Routley-Meyer semantics can be also used not merely for relevance systems but also for other logical systems such as ${\L}C$ and LC, each of which has its own implication by which we can overcome (partially) the problem of "paradoxes of material implication".

• Journal of the Korean Institute of Intelligent Systems
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• v.12 no.2
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• pp.135-143
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• 2002

In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast courier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like {0, 1, 2, 3}. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used toed as LUT(Lood Up Table).

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.1338-1341
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• 1993

We present here two Petri nets formalisms that can deal with uncertainty by the use of necessity-valued logic. The first and basic model, called necessity-valued Petri nets (NPN), can at the same time deal with uncertainty on markings are on transitions. The second model, called necessity-valued Petri nets (TNPN), is an extension of both NPN and timed Petri nets.