• Journal of IKEEE
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• v.23 no.3
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• pp.1015-1019
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• 2019

In this paper, a new ESD protection device is proposed to improve the trigger voltage and robustness. The HHVSCR and the proposed device were compared to verify the trigger voltage, the holding voltage and the robustness. The gate length was modified to verify the electrical characteristics. The trigger voltage, the holding voltage and the robustness were certified by comparing the proposed device and the stacking structure.

• ETRI Journal
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• v.35 no.5
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• pp.797-807
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• 2013

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35-${\mu}m$ standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of ($V_{CC}/2$) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, $V_{CC}$ is the fixed voltage supply of 3.3 V.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.201.2-201.2
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• 2016

The triggered vacuum switch (TVS) is widely used as a high power switch in the field of pulsed power application. TVS can produce current of higher than 100 kA within a microsecond after being triggered. A triggering high voltage pulse generator supplies a high voltage signal to the trigger system to initiate the discharge between a trigger pin and one of main electrode. The trigger system, which consists of a tungsten trigger electrode and cylindrical ceramic insulator around it, is normally installed at the center of main cathode electrode. The discharging characteristics of the trigger system strongly depend on the geometry, electrode material, vacuum pressure and so on. In addition, we especially will focus on the developing a triggering pulse generator, which can vary not only value of voltage but also pulse duration, because its properties gives pivot influences on the TVS discharge. To verify such effects, we made a 3.3 kJ TVS set-up initially. Thus we will discuss some of prominent results from 3.3 kJ TVS system. In parallel we will show on the design of 300 kJ TVS system for the high current in the future.

• Journal of Electrical Engineering and Technology
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• v.5 no.4
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• pp.646-652
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• 2010

This paper investigates a method to improve the breakdown voltage characteristics of a gas discharge arrester (GDA) for a surge suppressor. The middle electrode is inserted between two terminal electrodes. Voltage application to the electrode synchronized and amplified by the impulse voltage decreases spark overvoltage from 45% to 57.6%. The decrease is caused by higher voltage slope, as opposed to applied impulse voltage (by 5.5 to 6.2 times). In addition, the GDA model using ATP-Draw was used to analyze the operation characteristics of GDAs. The test and simulation results agree to within 2% when the trigger source was used.

• Journal of IKEEE
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• v.25 no.1
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• pp.168-173
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• 2021

In this paper, we propose a new structure of ESD protection device that achieves improved electrical characteristics through structural change of LVTSCR, which is a general ESD protection device. In addition, it applies N-Stack technology for optimized design in the ESD Design Window according to the required voltage application. The N-Well area additionally inserted in the existing LVTSCR structure provides an additional ESD discharge path by electrically connecting to the anode, which improves on-resistance and temperature characteristics. In addition, the short trigger path has a lower trigger voltage than the existing LVTSCR, so it has excellent snapback characteristics. In addition, Synopsys' T-CAD Simulator was used to verify the electrical characteristics of the proposed ESD protection device.

• ETRI Journal
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• v.37 no.1
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• pp.97-106
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• 2015

In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

• ETRI Journal
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• v.31 no.6
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• pp.725-731
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• 2009

In this paper, electrostatic discharge (ESD) protection circuits with an advanced substrate-triggered NMOS and a gate-substrate-triggered NMOS are proposed to provide low trigger voltage, low leakage current, and fast turn-on speed. The proposed ESD protection devices are designed using 0.13 ${\mu}m$ CMOS technology. The experimental results show that the proposed substrate-triggered NMOS using a bipolar transistor has a low trigger voltage of 5.98 V and a fast turn-on time of 37 ns. The proposed gate-substrate-triggered NMOS has a lower trigger voltage of 5.35 V and low leakage current of 80 pA.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.4
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• pp.549-553
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• 2018

The applications of the pulse power technology are expanding and the necessity of a large current switch as a core component of pulsed power is increasing. A trigger gap switch composed of three electrodes was fabricated and the discharge characteristics were studied according to the change of the pressure, the shape of the main electrode, and the gap distance when the trigger pulse was applied. As a main result, the stable operation range was confirmed through the discharge inception voltage according to the gap distance and electric field analysis was performed in the same structure to confirm the electric field value of the discharge inception voltage.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2067-2069
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• 1998

A prototype semiconductor switch for the command resonant charging system has been developed for a line type modulator, which charges parallel pulse forming network(PFN) up to voltage of 5 kV at repetition rates of 60 Hz. A phase controlled power supply provides charging of the 4.7 ${\mu}s$ filter capacitor bank to voltage up to 5 kV. A solid state module of series stack array of sixe matched SCRs(1.6 kV, 50 A) is used as a command charging switch to initiate the resonant charging cycle. Both resistive and RC snubber network are used across each stage of the switch assembly in order to ensure proper voltage division during both steady state and transient condition. A master trigger signal is generated to trigger circuits which are transmitted through pulse transformer to each of the 6 series switch stages. A pulse transformer is required for high voltage trigger or power isolation. This paper will discuss trigger method, protection scheme, circuit simulation, and test result.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1683-1693
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• 2017

This paper analyses the harmonic pollution to power grids caused by thyristor-controlled devices. It also formulates a mathematic derivation for the voltage spikes in thyristor-controlled branches to explain the harmonic and EMI derived from the reverse-recovery characteristics of the thyristor. With an equivalent nonlinear time-varying voltage source, a detailed simulation model is established, and the periodic dynamic switching characteristic of the thyristor can be explicitly implied. The simulation results are consistent with the probed results from on-site measurements. An improved trigger system with gate-shorted circuit structure is proposed to reduce the voltage spikes that cause EMI. The experimental results indicate that a prototype with the improved trigger system can effectively suppress the voltage spikes.