• 전력전자학회논문지
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• 제5권2호
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• pp.154-162
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• 2000

본 논문에서는 3상 강압형 다이오드 정류기에서 출력전압의 저주파 리플 전압을 감소시키기 위한 새로운 제어기법을 제안한다. 제안한 펄스 주파수 변조 기법은 강압형 다이오드 정류기의 출력전압과 넓은 부하 범위에 대한 주 스위치의 영전류 스위칭을 보장하기 위해 적용된다. 본 논문에서 적용된 펄스 주파수 변조 기법은 일반적으로 입력전류의 낮은 고조파의 단위 역률의 장점을 지니고 있다. 또한 출력전압에서 보여진 저주파 리플전압을 감소시키기 위해 효과적으로 사용되어진다. 제안된 제어기법을 자세하게 설명하며 그 타당성을 검증하기 위해 시뮬레인션 및 실험을 통하여 검증한다.

• Journal of Power Electronics
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• 제16권5호
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• pp.1964-1980
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• 2016

This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.

• Journal of Power Electronics
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• 제18권3호
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

• 전력전자학회논문지
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• 제23권2호
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• pp.86-93
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• 2018

In this work, control methods and operating modes are proposed to manage standalone microgrid. A standalone microgrid generally consists of two sources, namely, battery energy storage system (BESS) and diesel generator (DG). BESS is the main source that supplies active and reactive power regardless of load conditions, whereas DG functions as an auxiliary power source. BESS operates in a constant voltage constant frequency (CVCF) control, which includes proportional-integral + resonant controller in a parallel structure. In CVCF control, the concept of fundamental positive and negative transformation is utilized to generate a three-phase sinusoidal voltage under imbalanced load condition. Operation modes of a standalone microgrid are divided into three modes, namely, normal, charge, and manual modes. To verify the standalone microgrid along with the proposed control methods, a demonstration site is constructed, which contains 115 kWh lead-acid battery bank, 50 kVA three-phase DC - AC inverter, and 50 kVA DG and controllable loads. In the CVCF control, the total harmonic distortion of output voltage is improved to 1.1% under imbalanced load. This work verifies that the standalone microgrid provides high-quality voltage, and three operation modes are performed from the experimental results.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권1호
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• pp.109-116
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• 2014

This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital delta-sigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of $16{\Omega}$ and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

• 대한전자공학회논문지SD
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• 제45권3호
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• pp.44-53
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• 2008

본 논문에서는 휴대용 오디고 제품의 헤드폰 구동을 위한 델타-시그마 변조기법 기반의 D급 증폭기를 제안한다. 제안된 D급 증폭기는 고성능 단일 비트 4차 델타-시그마 변조기를 이용하여 펄스폭 변조 신호를 발생시킨다. 높은 신호 대 잡음비를 얻는 것과 동시에 시스템의 안정성 확보를 위하여 시뮬레이션을 통해 변조기 루프필터의 폴과 제로를 최적화하였다. 테스트 칩은 $0.18{\mu}m$ CMOS 공정으로 제작되었다. 칩 면적은 $1.6mm^2$ 이며, 20Hz 부터 20kHz까지의 신호대역을 대상으로 동작한다. 3V 전원전압과 32옴의 로드를 사용하여 측정된 출력은 0.03% 이하의 전고조파 왜율을 갖는다.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.168-180
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• 2018

In order to achieve the high quality output voltage of single-phase voltage source inverters, in this paper an Adaptive Complementary Sliding Mode Control (ACSMC) is proposed. Firstly, the dynamics model of the single-phase inverter with lumped uncertainty including parameter variations and external disturbances is derived. Then, the conventional Sliding Mode Control (SMC) and Complementary Sliding Mode Control (CSMC) are introduced separately. However, when system parameters vary or external disturbance occurs, the controlling performance such as tracking error, response speed et al. always could not satisfy the requirements based on the SMC and CSMC methods. Consequently, an ACSMC is developed. The ACSMC is composed of a CSMC term, a compensating control term and a filter parameters estimator. The compensating control term is applied to compensate for the system uncertainties, the filter parameters estimator is used for on-line LC parameter estimation by the proposed adaptive law. The adaptive law is derived using the Lyapunov theorem to guarantee the closed-loop stability. In order to decrease the control system cost, an inductor current estimator is developed. Finally, the effectiveness of the proposed controller is validated through Matlab/Simulink and experiments on a prototype single-phase inverter test bed with a TMS320LF28335 DSP. The simulation and experimental results show that compared to the conventional SMC and CSMC, the proposed ACSMC control strategy achieves more excellent performance such as fast transient response, small steady-state error, and low total harmonic distortion no matter under load step change, nonlinear load with inductor parameter variation or external disturbance.

• 한국정보통신학회논문지
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• 제17권5호
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• pp.1187-1195
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• 2013

태양광 인버터는 항상 태양전지 어레이의 최대 전력을 추종하며 동작해야 한다. 또한 태양광 인버터는 폭넓은 태양전지의 최대 전력점 전압과 관계없이 최대 전력점을 추종해야 한다. 태양전지의 전류리플이 발생한다면 최대 전력점 추종 기능이 저하되고 일사량 변동이나 최대 전력점 변동 시 정상적으로 추종하기 어려워진다. 이러한 문제점을 해결하기 위해 본 논문에서는 고효율의 새로운 최대 전력점 추종 알고리즘과 태양전지의 전류리플 감소 알고리즘을 제안하였다. 4KW급 계통연계형 태양광 인버터에 적용하여 실험한 결과 최대 전력점 추종 효율이 99.97%, 인버터 출력 효율은 97.5%, 인버터 전류의 고조파 총 왜곡률은 1.05%로 우수한 성능을 보였다. 또한 0.5초 동안 일사량을 100% -> 10%, 10% -> 100%로 급격히 변동하였을 때에도 안정된 최대 전력점 추종이 가능함을 알 수 있었다.

• Journal of Power Electronics
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• 제15권2호
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• pp.555-566
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• 2015

A TRIAC dimming LED driver that can control the brightness of LED arrays for a wide range of source voltage variations is proposed in this paper. Unlike conventional PWM LED drivers, the proposed LED driver adopts a TRIAC switch, which inherently guarantees zero current switching and has been proven to be quite reliable over its long lifetime. Unlike previous TRIAC type LED drivers, the proposed LED driver is composed of an LC input filter and a variable switched capacitance, which is modulated by the TRIAC turn-on timing. Thus, the LED power regulation and dimming control, which are done by a volume resistor in the same way as the conventional TRIAC dimmers, can be simultaneously performed by the TRIAC control circuit. Because the proposed LED driver has high efficiency and a long lifetime with a high power factor (PF) and low total harmonic distortion (THD) characteristics, it is quite adequate for industrial lighting applications such as streets, factories, parking garages, and emergency stairs. A simple step-down capacitive power supply circuit composed of passive components only is also proposed, which is quite useful for providing DC power from an AC source without a bulky and heavy transformer. A prototype 60 W LED driver was implemented by the proposed design procedure and verified by simulation and experimental results, where the efficiency, PF, and THD are 92%, 0.94, and 6.3%, respectively. The LED power variation is well mitigated to below ${\pm}2%$ for 190 V < $V_s$ < 250 V by using the proposed simple control circuit.

• Journal of Power Electronics
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• 제13권6호
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• pp.939-954
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• 2013

The Direct Torque Control (DTC) technique for Permanent Magnet Synchronous Motors (PMSM) is receiving increased attention due to its simplicity and robust dynamic response when compared with other control techniques. The classical switching table based DTC results in large flux and torque ripples in the motors. Several studies have been reported in the literature on classical DTC. However, there are only limited studies that actually discuss or evaluate the classical DTC. This paper proposes, novel switching table / DTC methods for PMSMs to reduce torque ripples. In this paper, two DTC schemes are proposed. The six sector and twelve sector methodology is considered in DTC scheme I and DTC scheme II, respectively. In both DTC schemes a simple modification is made to the classical DTC structure. The two level inverter available in the classical DTC is eliminated by replacing it with a three level Neutral Point Clamped (NPC) inverter. To further improve the performance of the proposed DTC scheme I, the available 27 voltage vectors are allowed to form different groups of voltage vectors such as Large - Zero (LZ), Medium - Zero (MZ) and Small - Zero (SZ), where as in DTC scheme II, all of the voltage vectors are considered to form a switching table. Based on these groups, a novel switching table is proposed. The proposed DTC schemes are comparatively investigated with the classical DTC and existing literatures through theory analysis and computer simulations. The superiority of the proposed DTC method is also confirmed by experimental results. It can be observed that the proposed techniques can significantly reduces the torque ripples and improves the quality of current waveform when compared with traditional and existing methods.