• The KIPS Transactions:PartD
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• v.17D no.4
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• pp.283-296
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• 2010

Timing diagram is a useful tool for describing the specification of system, but there is no study for test case strategy of a timing diagram. To solve this problem, we followed the steps to generate test cases from timing diagram in this paper. 1) We defined a timing diagram formally. 2) We describe the method of transforming from a timing diagram model into a Stateflow model which has an equivalent relationship between a timing diagram model and a transformed Stateflow model. 3) We generated test cases from a transformed Stateflow model using SDV which is plugged in Simulink. To show that our approach is useful, we made an experiment with a surveillance model and arbitrary timing diagram models. In the experiment we transformed timing diagram models into Stateflow models, generated test cases from transformed Stateflow models using SDV, and analyzed the generation results. The conclusion that can be obtained from this study is that timing diagram is not only a specification tool but also a useful tool when users are trying to generate test cases based on model.

• The KIPS Transactions:PartD
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• v.17D no.5
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• pp.337-346
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• 2010

Timing diagram is popularly utilized for the reason of its advantages; it is convenient for timing diagram to describe behavior of system and it is simple for described behaviors to recognize it. Various techniques are needed to test systems described in timing diagram. One of them is a technique to derive the system into a certain condition under which a test case is effective. This paper proposes a technique to automatically generate the test input sequence to reach the condition for systems described in timing diagram. It requires a proper input set which satisfy transition condition restricted by input waveform and timing constraints to generate a test input sequence automatically. To solve the problem, this paper chooses an approach utilizing the linear programming, and solving procedure is as follows: 1) Get a Timing diagram model as an input, and transforms the timing diagram model into a linear programming problem. 2) Solve the linear programming problem using a linear programming tool. 3) Generate test input sequences of a timing diagram model from the solution of linear programming problem. This paper addresses the formal method to drive the linear programming model from a given timing diagram, shows the feasibility of our approach by prove it, and demonstrates the usability of our paper by showing that our implemented tool solves an example of a timing diagram model.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12B
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• pp.1227-1235
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• 2010

Stateflow is a useful system modeling tool, which is frequently used in industry. But Stateflow has defects when users are trying to describe consecutive behaviors or a system's temporal behaviors. Timing diagram, on the other hand, is a widely used tool of explaining behaviors of a hardware system in electronics. This tool has a merit when specifying consecutive behaviors and temporal behaviors of a system. Thus, this paper suggests $Stateflow_{TD}$, the unified modeling methodology in Stateflow domain integrating Stateflow with Timing diagram in order to improve the shortcomings of Stateflow. This paper not only explains a technique of integrating both a Stateflow model and Timing diagram models, and describes advantages of what $Stateflow_{TD}$ formalism has, but also shows its convenience using two example systems.

• Korean Journal of Applied Biomechanics
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• v.14 no.3
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• pp.17-35
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• 2004

The purpose of this study is to explain developmental process of gait via angle-angle diagram to understand how coordinated relationships and control change with age. Twenty four female children, from one to five years of age were the test subjects for this study, and their results were compared to a control group consisting of twenty one adult females. The Vicon 370 CCD camera, VCR, video timer, monitor, and audio visual mixer was utilized to graph the gait cycle for all test subjects. Both coordinated Intra-limb relationships, and range of motion and timing according to quadrant were explained through the angle angle diagram. Movement in the sagittal plane showed both coordinated relationships and control earlier than movement in the coronal or transverse plane. In the sagittal plane, hip and Knee coordinated relationships developed first (from one year of age.) Coordinated relationships in the Knee and ankle and hip and ankle developed next, respectively. Both hip and ankle and knee and ankle development were inhibited by the inability of children to completely perform plantar flexion during the swing and initial double limb support phases. Children appeared to compensate for this by extending at their hip joint more than adults during the third phase, final double limb support. In many cases the angle angle diagram for children had a similar shape as adult's angle angle diagram. This shows that children can coordinate their movements at an early age. However, the magnitudes and timing of children's angle angle diagrams still varied greatly from adults, even at five years of age. This indicates that even at this age, children still do not possess full control of their movements.

• The KIPS Transactions:PartD
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• v.13D no.7 s.110
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• pp.923-930
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• 2006

In this paper we design the system test model for the weapon system embedded software based on the Time Factor Method(TFM) considering time factors and suggest the results through the case study. For doing this, we discuss the features, system tests and the object-oriented model based UML notations of the weapon system embedded software. And we give a test method considering time factors, a measuring method to time factors, and a test case selection algorithm as an approach to the TFM for designing the system test model. The TFM based system test model consists of three factors (X, Y, Z) in the weapon system embedded software. With this model, we can extract test cases through the selection algorithm for a maximum time path in 'X', identify the objects related to the Sequence Diagram in 'Y' and measure the execution time of each objects which is identified by the Timing Diagram in 'Z' Also, we present the method of extracting the system test cases by applying the proposed system test model to the 'Multi-function missile defense system'.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.121-124
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• 2002

The IEEE 802.lla PLCP H/W for Processing efficiently control message between MAC and PHY is designed. Slate machine and clock control according to rate is designed and timing diagram is verified on the FPGA simulation environment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.386-389
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• 2013

In this paper, for signal integrity analysing high-speed signal between a processor and a DDR2 memory, transient analysis is done and eye diagrams are generated using IBIS models of IC chips and S-parameters of transmission line. From the eye diagrams of such high-speed signals as DQ, DQS/DQSb, Clock, Address and Control, signal quality is assured through measuring timing and voltage margins during setup and hold times and verifying that the over-/under-shoot and the cross points of differential signals satisfy their specifications.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.05a
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• pp.82-87
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• 2001

In this paper we described the generation method of interface logic which can be replace between IP and IP handshaking signal with asynchronous logic circuit. Especially, we suggest the new \"Waveform Conversion Algorithm : Wave2VHDL\", if only mixed asynchronous timing waveform suggested which level type input and pulse type input for handshaking, we can convert waveform to flowchart and then replaced with VHDL code according to converted flowchart. Also, we assure that asynchronous electronic circuits for IP interface are generated by applying extracted VHDL source code from suggested algorithm to conventional domestic/abroad CAD Tool, and then we proved that coincidence simulation result and suggested timing diagram.g diagram.

• Proceedings of the Korean Information Science Society Conference
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• 2006.06c
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• pp.172-174
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• 2006

본 연구에서는 시간 요소를 고려한 무기체계 소프트웨어의 시스템 테스트 모델을 제시한다. 이를 위해 컴포넌트 기반의 UML 표기법과 무기체계의 시간 제약 특징을 고려한 무기체계 소프트웨어의 시스템 테스트 모델인 TFM(Time Factor Method) 모델을 제안한다. TFM 모델은 세 가지 요소인 (X.Y,Z)으로 구성되어 있는데. "X" 에서는 최대시간경로를 선정하는 알고리즘을 통해 테스트 케이스가 도출되고, "Y" 에서는 Sequence Diagram과 관련된 컴포넌트(오브젝트)를 식별하고, "Z"에서는 Timing Diagram을 통하여 식별된 각각의 컴포넌트의 실행시간을 측정한다. 또한 제안된 TFM 모델의 적용사례를 들어 테스트 케이스를 도출한다.

• Journal of the Korea Society for Simulation
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• v.10 no.1
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• pp.25-34
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• 2001

In this paper, we describe the generation method of interface logic which replace between IP & IP handshaking signal with asynchronous logic circuit. Especially, we suggest the new asynchronous sequential "Waveform to VHDL" code creation algorithm by flow chart conversion : Wave2VHDL - if only mixed asynchronous timing waveform is presented the level type input and pulse type input for handshaking, we convert waveform to flowchart and then replace with VHDL code according to converted flowchart. Also, we confirmed that asynchronous electronic circuits are created by applying extracted VHDL source code from suggest algorithm to conventional domestic/abroad CAD Tool, Finally, we assured the simulation result and the suggest timing diagram are identical.